]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: aspeed: Add ASPEED AST2600 architecture
authorJoel Stanley <joel@jms.id.au>
Wed, 21 Aug 2019 05:55:26 +0000 (15:25 +0930)
committerJoel Stanley <joel@jms.id.au>
Sun, 25 Aug 2019 13:56:50 +0000 (23:26 +0930)
The AST2600 is a Cortex A7 dual core CPU that uses the ARM GIC for
interrupts and ARM timer as a clocksource.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/mach-aspeed/Kconfig

index 2979aa4daeeacdef8cc3f3f103b0519aa06fb1c0..56007b0b6120d626cc2c2deb0e63067dd521439b 100644 (file)
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 menuconfig ARCH_ASPEED
        bool "Aspeed BMC architectures"
-       depends on ARCH_MULTI_V5 || ARCH_MULTI_V6
+       depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
        select SRAM
        select WATCHDOG
        select ASPEED_WATCHDOG
@@ -33,4 +33,16 @@ config MACH_ASPEED_G5
         Say yes if you intend to run on an Aspeed ast2500 or similar
         fifth generation Aspeed BMCs.
 
+config MACH_ASPEED_G6
+       bool "Aspeed SoC 6th Generation"
+       depends on ARCH_MULTI_V7
+       select CPU_V7
+       select PINCTRL_ASPEED_G6
+       select ARM_GIC
+       select HAVE_ARM_ARCH_TIMER
+       select HAVE_SMP
+       help
+        Say yes if you intend to run on an Aspeed ast2600 or similar
+        sixth generation Aspeed BMCs.
+
 endif