]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/nouveau/mc/gf100-: support for masking interrupts
authorBen Skeggs <bskeggs@redhat.com>
Sun, 29 May 2016 22:50:50 +0000 (08:50 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 14 Jul 2016 01:53:25 +0000 (11:53 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

index b1126a5a8b047f18546dfbeebb55a08250c37fe6..d2c4d6033abb0a96ec3851e1fa13cd2a1a648aea 100644 (file)
@@ -84,6 +84,14 @@ gf100_mc_intr_stat(struct nvkm_mc *mc)
        return intr0 | intr1;
 }
 
+void
+gf100_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 stat)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_mask(device, 0x000640, mask, stat);
+       nvkm_mask(device, 0x000644, mask, stat);
+}
+
 void
 gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
 {
@@ -96,6 +104,7 @@ gf100_mc = {
        .intr = gf100_mc_intr,
        .intr_unarm = gf100_mc_intr_unarm,
        .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .intr_stat = gf100_mc_intr_stat,
        .reset = gf100_mc_reset,
        .unk260 = gf100_mc_unk260,
index 99426814c7f714ed4f211895356fc779d0dbd437..c6cc7a43537d1931ac46a4546bf807b31c7dce9f 100644 (file)
@@ -52,6 +52,7 @@ gk104_mc = {
        .intr = gk104_mc_intr,
        .intr_unarm = gf100_mc_intr_unarm,
        .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .intr_stat = gf100_mc_intr_stat,
        .reset = gk104_mc_reset,
        .unk260 = gf100_mc_unk260,
index 985f8cbab5c4368b5c6a0947b5d9872f3ad0a0a3..ca1bf3279dbe9a046c958cfe744e7f60fd07cfa8 100644 (file)
@@ -29,6 +29,7 @@ gk20a_mc = {
        .intr = gk104_mc_intr,
        .intr_unarm = gf100_mc_intr_unarm,
        .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .intr_stat = gf100_mc_intr_stat,
        .reset = gk104_mc_reset,
 };
index fb4ce6df50f451235722c6295cc9442840080be4..4f0576a06d2454489ffdcce6d3b601a286653a98 100644 (file)
@@ -44,6 +44,7 @@ void nv50_mc_init(struct nvkm_mc *);
 
 void gf100_mc_intr_unarm(struct nvkm_mc *);
 void gf100_mc_intr_rearm(struct nvkm_mc *);
+void gf100_mc_intr_mask(struct nvkm_mc *, u32, u32);
 u32 gf100_mc_intr_stat(struct nvkm_mc *);
 void gf100_mc_unk260(struct nvkm_mc *, u32);