]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/radeon/kv: implement get_current_sclk/mclk
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 30 Sep 2014 15:21:23 +0000 (11:21 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Mar 2015 16:26:36 +0000 (12:26 -0400)
Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/kv_dpm.c
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h

index 0e236d067d6648a5a5a17c5a60ead839372d0c0d..2d71da448487d40401e45e80fb4331f247e62249 100644 (file)
@@ -2820,6 +2820,29 @@ void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
        }
 }
 
+u32 kv_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+       struct kv_power_info *pi = kv_get_pi(rdev);
+       u32 current_index =
+               (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_SCLK_INDEX_MASK) >>
+               CURR_SCLK_INDEX_SHIFT;
+       u32 sclk;
+
+       if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
+               return 0;
+       } else {
+               sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);
+               return sclk;
+       }
+}
+
+u32 kv_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+       struct kv_power_info *pi = kv_get_pi(rdev);
+
+       return pi->sys_info.bootup_uma_clk;
+}
+
 void kv_dpm_print_power_state(struct radeon_device *rdev,
                              struct radeon_ps *rps)
 {
index ce0cbd5823e957defa67ff8cbcc414c3989a6635..466a7715e2864cded17739b3b1aaa8a81eb9e146 100644 (file)
@@ -2249,6 +2249,8 @@ static struct radeon_asic kv_asic = {
                .force_performance_level = &kv_dpm_force_performance_level,
                .powergate_uvd = &kv_dpm_powergate_uvd,
                .enable_bapm = &kv_dpm_enable_bapm,
+               .get_current_sclk = &kv_dpm_get_current_sclk,
+               .get_current_mclk = &kv_dpm_get_current_mclk,
        },
        .pflip = {
                .page_flip = &evergreen_page_flip,
index bab229377264abc84facd2e029f4c5a69348ab96..4259daf94d91a51fdedb7ba73ba09813798cc755 100644 (file)
@@ -908,6 +908,8 @@ int kv_dpm_force_performance_level(struct radeon_device *rdev,
                                   enum radeon_dpm_forced_level level);
 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
 void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable);
+u32 kv_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 kv_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /* uvd v1.0 */
 uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev,