ARM: dts: imx6-tx6: specify ethernet phy reset post-delay

Under certain circumstances the ethernet PHY cannot be detected on
Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least
2ms alleviates this problem. Define it to 10ms to be on the safe side.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
index f2cd3e77c536946aadc86ef538f7ca6595bdefeb..f1655b3ba1ad394623a3451826b1a22ca8c04d90 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
@@ -249,6 +249,7 @@ &fec {
        clock-names = "ipg", "ahb", "ptp", "enet_out";
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
+       phy-reset-post-delay = <10>;
        phy-handle = <&etnphy>;
        phy-supply = <&reg_3v3_etn>;
        status = "okay";