clk: qcom: hfpll: register as clock provider

Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20191125135910.679310-4-niklas.cassel@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index a6de7101430ceb93df82fcfa2d716a3facb9e7e0..e64c0fd82fe4600a7ab274a997a2d62e99fc3d34 100644 (file)
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -57,6 +57,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
                .num_parents = 1,
                .ops = &clk_ops_hfpll,
        };
+       int ret;
 
        h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
        if (!h)
@@ -79,7 +80,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
        h->clkr.hw.init = &init;
        spin_lock_init(&h->lock);
 
-       return devm_clk_register_regmap(&pdev->dev, &h->clkr);
+       ret = devm_clk_register_regmap(dev, &h->clkr);
+       if (ret) {
+               dev_err(dev, "failed to register regmap clock: %d\n", ret);
+               return ret;
+       }
+
+       return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+                                          &h->clkr.hw);
 }
 
 static struct platform_driver qcom_hfpll_driver = {