KVM: arm64: Fix ptrauth ID register masking logic

When a VCPU doesn't have pointer auth, we want to hide all four pointer
auth ID register fields from the guest, not just one of them.

Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
Reported-by: Andrew Murray <andrew.murray@arm.com>
Fscked-up-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 9d02643bc60161dfb6fcbfb83f199bdbecdf7ed2..857b226bcdde34e8e00bf660328777c121c4b1f8 100644 (file)
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
        if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
                val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
        } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
-               val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
-                       (0xfUL << ID_AA64ISAR1_API_SHIFT) |
-                       (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
-                       (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
+               val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
+                        (0xfUL << ID_AA64ISAR1_API_SHIFT) |
+                        (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
+                        (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
        }
 
        return val;