ARM: dts: Enable UART2 pinctrl on LogicPD Torpedo + Wireless module

Setup UART2 for communication at 3MBps with flow control.

Signed-off-by: Adam Ford <adam.ford@logicpd.com>
[tony@atomide.com: dropped the kim changes, that binding has been removed]
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index c8091ff81d743c26c4216b643d6294d582dd687a..78c52436cddbd63984b5e036aeab15b060347993 100644 (file)
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -157,6 +157,21 @@ OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
                        OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
                >;
        };
+       uart2_pins: pinmux_uart2_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
+                       OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
+                       OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
+                       OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
+                       OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
+               >;
+       };
+};
+
+&uart2 {
+       interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
 };
 
 &omap3_pmx_core2 {