]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amd/powerplay: fix power over limit on Fiji
authorEric Huang <JinHuiEric.Huang@amd.com>
Mon, 26 Feb 2018 22:36:19 +0000 (17:36 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Feb 2018 20:17:11 +0000 (15:17 -0500)
power containment disabled only on Fiji and compute
power profile. It violates PCIe spec and may cause power
supply failed. Enabling it will fix the issue, even the
fix will drop performance of some compute tests.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

index 45be31327340cf763ee5f1b50707282f5bd85f00..08e8a793714f26dc38e571a51b52f8421bb72444 100644 (file)
@@ -4537,13 +4537,6 @@ static int smu7_set_power_profile_state(struct pp_hwmgr *hwmgr,
        int tmp_result, result = 0;
        uint32_t sclk_mask = 0, mclk_mask = 0;
 
-       if (hwmgr->chip_id == CHIP_FIJI) {
-               if (request->type == AMD_PP_GFX_PROFILE)
-                       smu7_enable_power_containment(hwmgr);
-               else if (request->type == AMD_PP_COMPUTE_PROFILE)
-                       smu7_disable_power_containment(hwmgr);
-       }
-
        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_AUTO)
                return -EINVAL;