]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/gvt: Rename ggtt related functions to be more specific
authorChangbin Du <changbin.du@intel.com>
Tue, 30 Jan 2018 11:19:45 +0000 (19:19 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 6 Mar 2018 05:19:16 +0000 (13:19 +0800)
Accurate names help to avoid confusing so improve readability.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/gtt.c
drivers/gpu/drm/i915/gvt/gtt.h
drivers/gpu/drm/i915/gvt/mmio.c

index 8ce82a294bea9137bf4b5a869958eff6f343cc81..162daad11ca4413f326b19e3b70795cf5cf7b3ef 100644 (file)
@@ -270,7 +270,7 @@ static u64 read_pte64(struct drm_i915_private *dev_priv, unsigned long index)
        return readq(addr);
 }
 
-static void gtt_invalidate(struct drm_i915_private *dev_priv)
+static void ggtt_invalidate(struct drm_i915_private *dev_priv)
 {
        mmio_hw_access_pre(dev_priv);
        I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
@@ -1873,7 +1873,7 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
        return INTEL_GVT_INVALID_ADDR;
 }
 
-static int emulate_gtt_mmio_read(struct intel_vgpu *vgpu,
+static int emulate_ggtt_mmio_read(struct intel_vgpu *vgpu,
        unsigned int off, void *p_data, unsigned int bytes)
 {
        struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
@@ -1902,7 +1902,7 @@ static int emulate_gtt_mmio_read(struct intel_vgpu *vgpu,
  * Returns:
  * Zero on success, error code if failed.
  */
-int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off,
+int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off,
        void *p_data, unsigned int bytes)
 {
        const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
@@ -1912,11 +1912,11 @@ int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off,
                return -EINVAL;
 
        off -= info->gtt_start_offset;
-       ret = emulate_gtt_mmio_read(vgpu, off, p_data, bytes);
+       ret = emulate_ggtt_mmio_read(vgpu, off, p_data, bytes);
        return ret;
 }
 
-static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
+static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
        void *p_data, unsigned int bytes)
 {
        struct intel_gvt *gvt = vgpu->gvt;
@@ -1969,13 +1969,13 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 
 out:
        ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index);
-       gtt_invalidate(gvt->dev_priv);
+       ggtt_invalidate(gvt->dev_priv);
        ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index);
        return 0;
 }
 
 /*
- * intel_vgpu_emulate_gtt_mmio_write - emulate GTT MMIO register write
+ * intel_vgpu_emulate_ggtt_mmio_write - emulate GTT MMIO register write
  * @vgpu: a vGPU
  * @off: register offset
  * @p_data: data from guest write
@@ -1986,8 +1986,8 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
  * Returns:
  * Zero on success, error code if failed.
  */
-int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
-       void *p_data, unsigned int bytes)
+int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
+               unsigned int off, void *p_data, unsigned int bytes)
 {
        const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
        int ret;
@@ -1996,7 +1996,7 @@ int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
                return -EINVAL;
 
        off -= info->gtt_start_offset;
-       ret = emulate_gtt_mmio_write(vgpu, off, p_data, bytes);
+       ret = emulate_ggtt_mmio_write(vgpu, off, p_data, bytes);
        return ret;
 }
 
@@ -2457,7 +2457,7 @@ void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu)
        while (num_entries--)
                ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
 
-       gtt_invalidate(dev_priv);
+       ggtt_invalidate(dev_priv);
 }
 
 /**
index 1d414792e72e25c3b6a7b3e42ebf5ebb6c8d3d6e..3bef5c9fc9260b1210928da4e912784fe3d3c855 100644 (file)
@@ -280,10 +280,10 @@ int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu,
 
 int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]);
 
-int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu,
+int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu,
        unsigned int off, void *p_data, unsigned int bytes);
 
-int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu,
+int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
        unsigned int off, void *p_data, unsigned int bytes);
 
 int intel_vgpu_write_protect_handler(struct intel_vgpu *vgpu, u64 pa,
index b8118cbeafe2fbb13ff19966d0b5755c08c477b2..11b71b33f1c0d8f82a598f39aa91382e5aeb58e3 100644 (file)
@@ -124,7 +124,7 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa,
                if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1)))
                        goto err;
 
-               ret = intel_vgpu_emulate_gtt_mmio_read(vgpu, offset,
+               ret = intel_vgpu_emulate_ggtt_mmio_read(vgpu, offset,
                                p_data, bytes);
                if (ret)
                        goto err;
@@ -197,7 +197,7 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa,
                if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1)))
                        goto err;
 
-               ret = intel_vgpu_emulate_gtt_mmio_write(vgpu, offset,
+               ret = intel_vgpu_emulate_ggtt_mmio_write(vgpu, offset,
                                p_data, bytes);
                if (ret)
                        goto err;