]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
igc: Use Start of Packet signal from PHY for timestamping
authorVinicius Costa Gomes <vinicius.gomes@intel.com>
Mon, 2 Dec 2019 23:19:53 +0000 (15:19 -0800)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Mon, 6 Jan 2020 23:02:45 +0000 (15:02 -0800)
For better accuracy, i225 is able to do timestamping using the Start of
Packet signal from the PHY.

Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igc/igc_defines.h
drivers/net/ethernet/intel/igc/igc_ptp.c

index 586fa14098eb80e81edab319b5fbaa4be54c0342..2121fc34e30031470deacb6a5e284f7d9d33068f 100644 (file)
 #define IGC_TSYNCRXCTL_TYPE_EVENT_V2   0x0A
 #define IGC_TSYNCRXCTL_ENABLED         0x00000010  /* enable Rx timestamping */
 #define IGC_TSYNCRXCTL_SYSCFI          0x00000020  /* Sys clock frequency */
+#define IGC_TSYNCRXCTL_RXSYNSIG                0x00000400  /* Sample RX tstamp in PHY sop */
 
 /* Time Sync Receive Configuration */
 #define IGC_TSYNCRXCFG_PTP_V1_CTRLT_MASK       0x000000FF
 #define IGC_TSYNCTXCTL_SYNC_COMP_ERR           0x20000000  /* sync err */
 #define IGC_TSYNCTXCTL_SYNC_COMP               0x40000000  /* sync complete */
 #define IGC_TSYNCTXCTL_START_SYNC              0x80000000  /* initiate sync */
+#define IGC_TSYNCTXCTL_TXSYNSIG                        0x00000020  /* Sample TX tstamp in PHY sop */
 
 /* Receive Checksum Control */
 #define IGC_RXCSUM_CRCOFL      0x00000800   /* CRC32 offload enable */
index 79ffb833aa80c6afecaaaa80defa6d954f33f754..693506587198e6e3ac9e2805ea1b98b27d37d6ce 100644 (file)
@@ -368,6 +368,7 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
        if (tsync_rx_ctl) {
                tsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED;
                tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL;
+               tsync_rx_ctl |= IGC_TSYNCRXCTL_RXSYNSIG;
                config->rx_filter = HWTSTAMP_FILTER_ALL;
                is_l2 = true;
                is_l4 = true;
@@ -384,8 +385,10 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
                }
        }
 
-       if (tsync_tx_ctl)
+       if (tsync_tx_ctl) {
                tsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED;
+               tsync_tx_ctl |= IGC_TSYNCTXCTL_TXSYNSIG;
+       }
 
        /* enable/disable TX */
        regval = rd32(IGC_TSYNCTXCTL);