drm/amdgpu/sriov: Correct the setting about sdma doorbell offset of Vega10

Correct the format

For vega10 sriov, the sdma doorbell must be fixed as follow to keep the
same setting with host driver, or it will happen conflicts.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 01a23157f6f5152387fcf44af0a5e2973371d399..c05b394386634b971c5402cd2612f759de9cfe7a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -420,6 +420,15 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
        AMDGPU_DOORBELL64_sDMA_ENGINE1            = 0xE8,
        AMDGPU_DOORBELL64_sDMA_HI_PRI_ENGINE1     = 0xE9,
 
+       /* For vega10 sriov, the sdma doorbell must be fixed as follow
+        * to keep the same setting with host driver, or it will
+        * happen conflicts
+        */
+       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0            = 0xF0,
+       AMDGPU_VEGA10_DOORBELL64_sDMA_HI_PRI_ENGINE0     = 0xF1,
+       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1            = 0xF2,
+       AMDGPU_VEGA10_DOORBELL64_sDMA_HI_PRI_ENGINE1     = 0xF3,
+
        /* Interrupt handler */
        AMDGPU_DOORBELL64_IH                      = 0xF4,  /* For legacy interrupt ring buffer */
        AMDGPU_DOORBELL64_IH_RING1                = 0xF5,  /* For page migration request log */

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 079e32b650d460c0cf1a9e2d78f5debb113a07de..03536a5e1232a0055ffda380650b591125e97991 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -178,14 +178,25 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
                         * process in case of 64-bit doorbells so we
                         * can use each doorbell assignment twice.
                         */
-                       gpu_resources.sdma_doorbell[0][i] =
-                               AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
-                       gpu_resources.sdma_doorbell[0][i+1] =
-                               AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
-                       gpu_resources.sdma_doorbell[1][i] =
-                               AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
-                       gpu_resources.sdma_doorbell[1][i+1] =
-                               AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
+                       if (adev->asic_type == CHIP_VEGA10) {
+                               gpu_resources.sdma_doorbell[0][i] =
+                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
+                               gpu_resources.sdma_doorbell[0][i+1] =
+                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
+                               gpu_resources.sdma_doorbell[1][i] =
+                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
+                               gpu_resources.sdma_doorbell[1][i+1] =
+                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
+                       } else {
+                               gpu_resources.sdma_doorbell[0][i] =
+                                       AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
+                               gpu_resources.sdma_doorbell[0][i+1] =
+                                       AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
+                               gpu_resources.sdma_doorbell[1][i] =
+                                       AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
+                               gpu_resources.sdma_doorbell[1][i+1] =
+                                       AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
+                       }
                }
                /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
                 * SDMA, IH and VCN. So don't use them for the CP.

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 2ea1f0d8f5bedcdeb9c2e53b84e3f9208597325b..9da4a1bff5c55619decc43f3460ee5e556cfd969 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1320,9 +1320,15 @@ static int sdma_v4_0_sw_init(void *handle)
                DRM_INFO("use_doorbell being set to: [%s]\n",
                                ring->use_doorbell?"true":"false");
 
-               ring->doorbell_index = (i == 0) ?
-                       (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) //get DWORD offset
-                       : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); // get DWORD offset
+               if (adev->asic_type == CHIP_VEGA10)
+                       ring->doorbell_index = (i == 0) ?
+                               (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1) //get DWORD offset
+                               : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1); // get DWORD offset
+               else
+                       ring->doorbell_index = (i == 0) ?
+                               (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1) //get DWORD offset
+                               : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1); // get DWORD offset
+
 
                sprintf(ring->name, "sdma%d", i);
                r = amdgpu_ring_init(adev, ring, 1024,