ARM: dts: hix5hd2: add sata node

Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
index 0da3f3b6721e62e9838b8185efa65aac0ec03b8e..721b09238f58846746053b64f113ea327723c60e 100644 (file)
--- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
+++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
@@ -79,3 +79,8 @@ phy1: ethernet-phy@1 {
                reg = <1>;
        };
 };
+
+&ahci {
+       phys = <&sata_phy>;
+       phy-names = "sata-phy";
+};

diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 4f9e8a3da2947fcd0aa0617b06cb51fa42fc2b9d..d5b3a8fd722644f9be393950754b4a1fcbf1e5e0 100644 (file)
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -215,5 +215,25 @@ usb1: ohci@1880000 {
                        interrupts = <0 67 4>;
                        clocks = <&clock HIX5HD2_USB_CLK>;
                };
+
+               peripheral_ctrl: syscon@a20000 {
+                       compatible = "syscon";
+                       reg = <0xa20000 0x1000>;
+               };
+
+               sata_phy: phy@1900000 {
+                       compatible = "hisilicon,hix5hd2-sata-phy";
+                       reg = <0x1900000 0x10000>;
+                       #phy-cells = <0>;
+                       hisilicon,peripheral-syscon = <&peripheral_ctrl>;
+                       hisilicon,power-reg = <0x8 10>;
+               };
+
+               ahci: sata@1900000 {
+                       compatible = "hisilicon,hisi-ahci";
+                       reg = <0x1900000 0x10000>;
+                       interrupts = <0 70 4>;
+                       clocks = <&clock HIX5HD2_SATA_CLK>;
+               };
        };
 };