m68knommu: make 520x QSPI platform addressing consistent

If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.

So modify the ColdFire 520x QSPI addressing so that:

. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index b83cee2dfdac5d70ee137be29459d9f893400fe4..17f2aab9cf979ac3118a9e083213500f8f316582 100644 (file)
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -61,6 +61,8 @@
 #define MCF_IRQ_FECTX0     (MCFINT_VECBASE + MCFINT_FECTX0)
 #define MCF_IRQ_FECENTC0    (MCFINT_VECBASE + MCFINT_FECENTC0)
 
+#define        MCF_IRQ_QSPI        (MCFINT_VECBASE + MCFINT_QSPI)
+
 /*
  *  SDRAM configuration registers.
  */
@@ -165,6 +167,16 @@
 #define        MCFFEC_BASE0            0xFC030000      /* Base of FEC ethernet */
 #define        MCFFEC_SIZE0            0x800           /* Register set size */
 
+/*
+ *  QSPI module.
+ */
+#define        MCFQSPI_BASE            0xFC05C000      /* Base of QSPI module */
+#define        MCFQSPI_SIZE            0x40            /* Register set size */
+
+#define        MCFQSPI_CS0             46
+#define        MCFQSPI_CS1             47
+#define        MCFQSPI_CS2             27
+
 /*
  *  Reset Control Unit.
  */

diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
index 7fe631972f1f5192acfb0e3f11229246b42e31ae..34a531ed2bd18436fdc2c0124189f201d38ad141 100644 (file)
--- a/arch/m68k/include/asm/mcfqspi.h
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -25,8 +25,6 @@
 #define        MCFQSPI_IOBASE          (MCF_IPSBAR + 0x340)
 #elif defined(CONFIG_M5249)
 #define MCFQSPI_IOBASE         (MCF_MBAR + 0x300)
-#elif defined(CONFIG_M520x)
-#define MCFQSPI_IOBASE         0xFC05C000
 #elif defined(CONFIG_M532x)
 #define MCFQSPI_IOBASE         0xFC058000
 #endif

diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
index 5746fa52ed56d1a587d0559057dc12ae9802568b..c83fd1a3d47cc2235f66217fb807963017fb23e0 100644 (file)
--- a/arch/m68k/platform/520x/config.c
+++ b/arch/m68k/platform/520x/config.c
@@ -28,21 +28,17 @@
 #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
 static struct resource m520x_qspi_resources[] = {
        {
-               .start          = MCFQSPI_IOBASE,
-               .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+               .start          = MCFQSPI_BASE,
+               .end            = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
                .flags          = IORESOURCE_MEM,
        },
        {
-               .start          = MCFINT_VECBASE + MCFINT_QSPI,
-               .end            = MCFINT_VECBASE + MCFINT_QSPI,
+               .start          = MCF_IRQ_QSPI,
+               .end            = MCF_IRQ_QSPI,
                .flags          = IORESOURCE_IRQ,
        },
 };
 
-#define MCFQSPI_CS0    46
-#define MCFQSPI_CS1    47
-#define MCFQSPI_CS2    27
-
 static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
 {
        int status;