drm/amd/powerplay: cleanup the interfaces for powergate setting through SMU

Provided an unified entry point. And fixed the confusing that the API
usage is conflict with what the naming implies.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 9cc270efee7cf00fd0c0cfec9ca7d6cfe7e91e6b..cd76fbf4385df44a2524b3d3fb0bdddf5718bdb0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -951,16 +951,31 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
        case AMD_IP_BLOCK_TYPE_VCN:
        case AMD_IP_BLOCK_TYPE_VCE:
        case AMD_IP_BLOCK_TYPE_SDMA:
+               if (swsmu) {
+                       ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate);
+               } else {
+                       if (adev->powerplay.pp_funcs &&
+                           adev->powerplay.pp_funcs->set_powergating_by_smu) {
+                               mutex_lock(&adev->pm.mutex);
+                               ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
+                                       (adev)->powerplay.pp_handle, block_type, gate));
+                               mutex_unlock(&adev->pm.mutex);
+                       }
+               }
+               break;
+       case AMD_IP_BLOCK_TYPE_JPEG:
                if (swsmu)
                        ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate);
-               else
-                       ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
-                               (adev)->powerplay.pp_handle, block_type, gate));
                break;
        case AMD_IP_BLOCK_TYPE_GMC:
        case AMD_IP_BLOCK_TYPE_ACP:
-               ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
+               if (adev->powerplay.pp_funcs &&
+                   adev->powerplay.pp_funcs->set_powergating_by_smu) {
+                       mutex_lock(&adev->pm.mutex);
+                       ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
                                (adev)->powerplay.pp_handle, block_type, gate));
+                       mutex_unlock(&adev->pm.mutex);
+               }
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index b32adda70bbc64dd3f92dccbf9f8ab3f56de27c0..285d460624c8cae4db81941f04d7137b8c798560 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -2762,17 +2762,12 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
 {
        int ret = 0;
-       if (is_support_sw_smu(adev)) {
-           ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_UVD, enable);
-           if (ret)
-               DRM_ERROR("[SW SMU]: dpm enable uvd failed, state = %s, ret = %d. \n",
-                         enable ? "true" : "false", ret);
-       } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
-               /* enable/disable UVD */
-               mutex_lock(&adev->pm.mutex);
-               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable);
-               mutex_unlock(&adev->pm.mutex);
-       }
+
+       ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable);
+       if (ret)
+               DRM_ERROR("Dpm %s uvd failed, ret = %d. \n",
+                         enable ? "enable" : "disable", ret);
+
        /* enable/disable Low Memory PState for UVD (4k videos) */
        if (adev->asic_type == CHIP_STONEY &&
                adev->uvd.decode_image_width >= WIDTH_4K) {
@@ -2789,17 +2784,11 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
 {
        int ret = 0;
-       if (is_support_sw_smu(adev)) {
-           ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_VCE, enable);
-           if (ret)
-               DRM_ERROR("[SW SMU]: dpm enable vce failed, state = %s, ret = %d. \n",
-                         enable ? "true" : "false", ret);
-       } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
-               /* enable/disable VCE */
-               mutex_lock(&adev->pm.mutex);
-               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable);
-               mutex_unlock(&adev->pm.mutex);
-       }
+
+       ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable);
+       if (ret)
+               DRM_ERROR("Dpm %s vce failed, ret = %d. \n",
+                         enable ? "enable" : "disable", ret);
 }
 
 void amdgpu_pm_print_power_states(struct amdgpu_device *adev)
@@ -2818,12 +2807,10 @@ void amdgpu_dpm_enable_jpeg(struct amdgpu_device *adev, bool enable)
 {
        int ret = 0;
 
-       if (is_support_sw_smu(adev)) {
-               ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_JPEG, enable);
-               if (ret)
-                       DRM_ERROR("[SW SMU]: dpm enable jpeg failed, state = %s, ret = %d. \n",
-                                 enable ? "true" : "false", ret);
-       }
+       ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_JPEG, !enable);
+       if (ret)
+               DRM_ERROR("Dpm %s jpeg failed, ret = %d. \n",
+                         enable ? "enable" : "disable", ret);
 }
 
 int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index b4cc0dc001896635c0981fa34fb7a33205cb5566..99469479e2770b1660ba720f94db4e40a4a41146 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -433,10 +433,10 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
 
        switch (block_type) {
        case AMD_IP_BLOCK_TYPE_UVD:
-               ret = smu_dpm_set_uvd_enable(smu, gate);
+               ret = smu_dpm_set_uvd_enable(smu, !gate);
                break;
        case AMD_IP_BLOCK_TYPE_VCE:
-               ret = smu_dpm_set_vce_enable(smu, gate);
+               ret = smu_dpm_set_vce_enable(smu, !gate);
                break;
        case AMD_IP_BLOCK_TYPE_GFX:
                ret = smu_gfx_off_control(smu, gate);
@@ -445,7 +445,7 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
                ret = smu_powergate_sdma(smu, gate);
                break;
        case AMD_IP_BLOCK_TYPE_JPEG:
-               ret = smu_dpm_set_jpeg_enable(smu, gate);
+               ret = smu_dpm_set_jpeg_enable(smu, !gate);
                break;
        default:
                break;