microblaze: mm: Flush TLB to ensure correct mapping when higmem ON

MMU contains invalid mapping which wasn't flushed and new mapping
is using the same addresses as previous one. That's why TLB miss is not
happening to get new correct TLB entry and MMU points to incorrect area.

This is replicatable when large files(256MB and more) are copied and
checked.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/microblaze/mm/highmem.c b/arch/microblaze/mm/highmem.c
index 2fcc5a52d84d1c2cf25d0cc45c356ce14549d74e..ed4454c5ce352549988b3d02213892f35783cb9f 100644 (file)
--- a/arch/microblaze/mm/highmem.c
+++ b/arch/microblaze/mm/highmem.c
@@ -60,6 +60,7 @@ void __kunmap_atomic(void *kvaddr)
 {
        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
        int type;
+       unsigned int idx;
 
        if (vaddr < __fix_to_virt(FIX_KMAP_END)) {
                pagefault_enable();
@@ -68,21 +69,18 @@ void __kunmap_atomic(void *kvaddr)
        }
 
        type = kmap_atomic_idx();
-#ifdef CONFIG_DEBUG_HIGHMEM
-       {
-               unsigned int idx;
-
-               idx = type + KM_TYPE_NR * smp_processor_id();
-               BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
 
-               /*
-                * force other mappings to Oops if they'll try to access
-                * this pte without first remap it
-                */
-               pte_clear(&init_mm, vaddr, kmap_pte-idx);
-               local_flush_tlb_page(NULL, vaddr);
-       }
+       idx = type + KM_TYPE_NR * smp_processor_id();
+#ifdef CONFIG_DEBUG_HIGHMEM
+       BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
 #endif
+       /*
+        * force other mappings to Oops if they'll try to access
+        * this pte without first remap it
+        */
+       pte_clear(&init_mm, vaddr, kmap_pte-idx);
+       local_flush_tlb_page(NULL, vaddr);
+
        kmap_atomic_idx_pop();
        pagefault_enable();
        preempt_enable();