drm/amd/display: remove GRPH_SURFACE_UPDATE_IMMEDIATE_EN field programming

This is causing asserts for dce 8 and 10 since they do not contain this
field. It is also unnecessary for later DCEs as it is left in it's
default state of 0

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
index 673371e5f9f0f50a9d6ba2b6dad4e4ccfa6b9dfb..157f4e1680e3167740348a64d482da49143f5f7d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
@@ -621,15 +621,10 @@ static bool dce_mi_program_surface_flip_and_addr(
 {
        struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mem_input);
 
-       /* TODO: Figure out if two modes are needed:
-        * non-XDMA Mode: GRPH_SURFACE_UPDATE_IMMEDIATE_EN = 1
-        * XDMA Mode: GRPH_SURFACE_UPDATE_H_RETRACE_EN = 1
-        */
        REG_UPDATE(GRPH_UPDATE, GRPH_UPDATE_LOCK, 1);
 
-       REG_UPDATE_2(
+       REG_UPDATE(
                GRPH_FLIP_CONTROL,
-               GRPH_SURFACE_UPDATE_IMMEDIATE_EN, 0,
                GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0);
 
        switch (address->type) {

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h
index 9d083cd79b4c7167097a5b3496f70760fe47a0a8..05d39c0cbe87c8c74dd92af2c9767e3ff008acc6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h
@@ -162,7 +162,6 @@ struct dce_mem_input_registers {
        SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_H_RETRACE_EN, mask_sh)
 
 #define MI_DCP_DCE11_MASK_SH_LIST(mask_sh, blk)\
-       SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_IMMEDIATE_EN, mask_sh),\
        SFB(blk, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, mask_sh)
 
 #define MI_DCP_PTE_MASK_SH_LIST(mask_sh, blk)\
@@ -278,7 +277,6 @@ struct dce_mem_input_registers {
        type GRPH_PRIMARY_SURFACE_ADDRESS_HIGH; \
        type GRPH_PRIMARY_SURFACE_ADDRESS; \
        type GRPH_SURFACE_UPDATE_PENDING; \
-       type GRPH_SURFACE_UPDATE_IMMEDIATE_EN; \
        type GRPH_SURFACE_UPDATE_H_RETRACE_EN; \
        type GRPH_UPDATE_LOCK; \
        type PIXEL_DURATION; \