static DEFINE_TIMER(cyz_timerlist, cyz_poll, 0, 0);
#else /* CONFIG_CYZ_INTR */
-static void cyz_rx_restart(unsigned long);
-static struct timer_list cyz_rx_full_timer[NR_PORTS];
+static void cyz_rx_restart(struct timer_list *);
#endif /* CONFIG_CYZ_INTR */
static void cyy_writeb(struct cyclades_port *port, u32 reg, u8 val)
else
char_count = rx_put - rx_get + rx_bufsize;
if (char_count >= readl(&buf_ctrl->rx_threshold) &&
- !timer_pending(&cyz_rx_full_timer[
- info->line]))
- mod_timer(&cyz_rx_full_timer[info->line],
- jiffies + 1);
+ !timer_pending(&info->rx_full_timer))
+ mod_timer(&info->rx_full_timer, jiffies + 1);
#endif
info->idle_stats.recv_idle = jiffies;
tty_schedule_flip(&info->port);
return IRQ_HANDLED;
} /* cyz_interrupt */
-static void cyz_rx_restart(unsigned long arg)
+static void cyz_rx_restart(struct timer_list *t)
{
- struct cyclades_port *info = (struct cyclades_port *)arg;
+ struct cyclades_port *info = from_timer(info, t, rx_full_timer);
struct cyclades_card *card = info->card;
int retval;
__u32 channel = info->line - card->first_line;
else
info->xmit_fifo_size = 4 * CYZ_FIFO_SIZE;
#ifdef CONFIG_CYZ_INTR
- setup_timer(&cyz_rx_full_timer[port],
- cyz_rx_restart, (unsigned long)info);
+ timer_setup(&info->rx_full_timer, cyz_rx_restart, 0);
#endif
} else {
unsigned short chip_number;