]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/crc: implement verify_crc_source callback
authorMahesh Kumar <mahesh1.kumar@intel.com>
Fri, 13 Jul 2018 13:59:38 +0000 (19:29 +0530)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Mon, 13 Aug 2018 12:00:20 +0000 (14:00 +0200)
This patch implements verify_crc_source callback function introduced
earlier in this series.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180713135942.25061-7-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pipe_crc.c

index cf0901240bd1bc0580e6d53045f0686e6a0bc864..b0daa95158dbf58115f5f135081eff1759f9a34f 100644 (file)
@@ -12865,6 +12865,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs = {
        .atomic_duplicate_state = intel_crtc_duplicate_state,
        .atomic_destroy_state = intel_crtc_destroy_state,
        .set_crc_source = intel_crtc_set_crc_source,
+       .verify_crc_source = intel_crtc_verify_crc_source,
 };
 
 struct wait_rps_boost {
index 64111ead499772c2f42182405372cba6154c37f5..fa0d2e1318165c8bd73939aac60661b217516680 100644 (file)
@@ -2153,10 +2153,13 @@ int intel_pipe_crc_create(struct drm_minor *minor);
 #ifdef CONFIG_DEBUG_FS
 int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name,
                              size_t *values_cnt);
+int intel_crtc_verify_crc_source(struct drm_crtc *crtc,
+                                const char *source_name, size_t *values_cnt);
 void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc);
 void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc);
 #else
 #define intel_crtc_set_crc_source NULL
+#define intel_crtc_verify_crc_source NULL
 static inline void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
 {
 }
index 39a4e4edda07052a31ec762cc5190b706d4fe713..a37521380f9434650799a2b392a7b7cfd26845e3 100644 (file)
@@ -913,6 +913,114 @@ int intel_pipe_crc_create(struct drm_minor *minor)
        return 0;
 }
 
+static int i8xx_crc_source_valid(struct drm_i915_private *dev_priv,
+                                const enum intel_pipe_crc_source source)
+{
+       switch (source) {
+       case INTEL_PIPE_CRC_SOURCE_PIPE:
+       case INTEL_PIPE_CRC_SOURCE_NONE:
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int i9xx_crc_source_valid(struct drm_i915_private *dev_priv,
+                                const enum intel_pipe_crc_source source)
+{
+       switch (source) {
+       case INTEL_PIPE_CRC_SOURCE_PIPE:
+       case INTEL_PIPE_CRC_SOURCE_TV:
+       case INTEL_PIPE_CRC_SOURCE_DP_B:
+       case INTEL_PIPE_CRC_SOURCE_DP_C:
+       case INTEL_PIPE_CRC_SOURCE_DP_D:
+       case INTEL_PIPE_CRC_SOURCE_NONE:
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int vlv_crc_source_valid(struct drm_i915_private *dev_priv,
+                               const enum intel_pipe_crc_source source)
+{
+       switch (source) {
+       case INTEL_PIPE_CRC_SOURCE_PIPE:
+       case INTEL_PIPE_CRC_SOURCE_DP_B:
+       case INTEL_PIPE_CRC_SOURCE_DP_C:
+       case INTEL_PIPE_CRC_SOURCE_DP_D:
+       case INTEL_PIPE_CRC_SOURCE_NONE:
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int ilk_crc_source_valid(struct drm_i915_private *dev_priv,
+                               const enum intel_pipe_crc_source source)
+{
+       switch (source) {
+       case INTEL_PIPE_CRC_SOURCE_PIPE:
+       case INTEL_PIPE_CRC_SOURCE_PLANE1:
+       case INTEL_PIPE_CRC_SOURCE_PLANE2:
+       case INTEL_PIPE_CRC_SOURCE_NONE:
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int ivb_crc_source_valid(struct drm_i915_private *dev_priv,
+                               const enum intel_pipe_crc_source source)
+{
+       switch (source) {
+       case INTEL_PIPE_CRC_SOURCE_PIPE:
+       case INTEL_PIPE_CRC_SOURCE_PLANE1:
+       case INTEL_PIPE_CRC_SOURCE_PLANE2:
+       case INTEL_PIPE_CRC_SOURCE_PF:
+       case INTEL_PIPE_CRC_SOURCE_NONE:
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int
+intel_is_valid_crc_source(struct drm_i915_private *dev_priv,
+                         const enum intel_pipe_crc_source source)
+{
+       if (IS_GEN2(dev_priv))
+               return i8xx_crc_source_valid(dev_priv, source);
+       else if (INTEL_GEN(dev_priv) < 5)
+               return i9xx_crc_source_valid(dev_priv, source);
+       else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+               return vlv_crc_source_valid(dev_priv, source);
+       else if (IS_GEN5(dev_priv) || IS_GEN6(dev_priv))
+               return ilk_crc_source_valid(dev_priv, source);
+       else
+               return ivb_crc_source_valid(dev_priv, source);
+}
+
+int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,
+                                size_t *values_cnt)
+{
+       struct drm_i915_private *dev_priv = to_i915(crtc->dev);
+       enum intel_pipe_crc_source source;
+
+       if (display_crc_ctl_parse_source(source_name, &source) < 0) {
+               DRM_DEBUG_DRIVER("unknown source %s\n", source_name);
+               return -EINVAL;
+       }
+
+       if (source == INTEL_PIPE_CRC_SOURCE_AUTO ||
+           intel_is_valid_crc_source(dev_priv, source) == 0) {
+               *values_cnt = 5;
+               return 0;
+       }
+
+       return -EINVAL;
+}
+
 int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name,
                              size_t *values_cnt)
 {