#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
struct nand_chip chip;
struct device *dev;
- struct clk *clk;
bool is_readmode;
/* Use board-specific ECC config */
info->chip.ecc.mode = pdata->ecc_mode;
- ret = -EINVAL;
-
- info->clk = devm_clk_get(&pdev->dev, "aemif");
- if (IS_ERR(info->clk)) {
- ret = PTR_ERR(info->clk);
- dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
- return ret;
- }
-
- ret = clk_prepare_enable(info->clk);
- if (ret < 0) {
- dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
- ret);
- goto err_clk_enable;
- }
-
spin_lock_irq(&davinci_nand_lock);
/* put CSxNAND into NAND mode */
ret = nand_scan_ident(mtd, pdata->mask_chipsel ? 2 : 1, NULL);
if (ret < 0) {
dev_dbg(&pdev->dev, "no NAND chip(s) found\n");
- goto err;
+ return ret;
}
switch (info->chip.ecc.mode) {
nand_cleanup(&info->chip);
err:
- clk_disable_unprepare(info->clk);
-
-err_clk_enable:
spin_lock_irq(&davinci_nand_lock);
if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME)
ecc4_busy = false;
nand_release(nand_to_mtd(&info->chip));
- clk_disable_unprepare(info->clk);
-
return 0;
}