gpu: ipu-v3: initially clear all interrupts

If we want to stop resetting the IPU in the future, masking all
interrupts before registering the irq handlers will not be enough to
avoid spurious interrupts. We also have to clear them.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Liu Ying <gnuiyl@gmail.com>

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index b7d7bd6e3d60d63f7d80c0c71915820aa09c60f0..97218af4fe75cbc218fc537803885b26a89399b4 100644 (file)
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1286,8 +1286,11 @@ static int ipu_irq_init(struct ipu_soc *ipu)
                return ret;
        }
 
-       for (i = 0; i < IPU_NUM_IRQS; i += 32)
+       /* Mask and clear all interrupts */
+       for (i = 0; i < IPU_NUM_IRQS; i += 32) {
                ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));
+               ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32));
+       }
 
        for (i = 0; i < IPU_NUM_IRQS; i += 32) {
                gc = irq_get_domain_generic_chip(ipu->domain, i);