]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: am57xx-beagle-x15: Add pinmux configuration for MMC
authorKishon Vijay Abraham I <kishon@ti.com>
Wed, 16 Aug 2017 13:45:02 +0000 (19:15 +0530)
committerTony Lindgren <tony@atomide.com>
Wed, 16 Aug 2017 14:54:09 +0000 (07:54 -0700)
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am57xx-beagle-x15/am57xx-beagle-x15-revb1.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
arch/arm/boot/dts/am57xx-beagle-x15.dts

index d433a50cd18aac1e4dc37c9aa0efe78e9e18e6e6..49aeecd312b4b10af2cb3badd68a4982fa8a921d 100644 (file)
@@ -9,6 +9,7 @@
 
 #include "dra74x.dtsi"
 #include "am57xx-commercial-grade.dtsi"
+#include "dra74x-mmc-iodelay.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
@@ -166,34 +167,6 @@ sound0_master: simple-audio-card,codec {
        };
 };
 
-&dra7_pmx_core {
-       mmc1_pins_default: mmc1_pins_default {
-               pinctrl-single,pins = <
-                       DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1sdcd.gpio219 */
-                       DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
-                       DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-                       DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-                       DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-                       DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-                       DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
-               >;
-       };
-
-       mmc2_pins_default: mmc2_pins_default {
-               pinctrl-single,pins = <
-                       DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
-                       DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
-                       DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
-                       DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
-                       DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
-                       DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
-                       DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
-                       DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
-                       DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
-                       DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
-               >;
-       };
-};
 &i2c1 {
        status = "okay";
        clock-frequency = <400000>;
index 578398c781b10f6bdb04d5eebfa9409e5726da90..5a77b334923d051f6943730b8d51849fe6161596 100644 (file)
@@ -19,10 +19,25 @@ &tpd12s015 {
 };
 
 &mmc1 {
+       pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+       pinctrl-0 = <&mmc1_pins_default>;
+       pinctrl-1 = <&mmc1_pins_hs>;
+       pinctrl-2 = <&mmc1_pins_sdr12>;
+       pinctrl-3 = <&mmc1_pins_sdr25>;
+       pinctrl-4 = <&mmc1_pins_sdr50>;
+       pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
+       pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
        vmmc-supply = <&vdd_3v3>;
        vqmmc-supply = <&ldo1_reg>;
 };
 
+&mmc2 {
+       pinctrl-names = "default", "hs", "ddr_1_8v";
+       pinctrl-0 = <&mmc2_pins_default>;
+       pinctrl-1 = <&mmc2_pins_hs>;
+       pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
+};
+
 /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
 &phy1 {
        max-speed = <100>;
index 19a60a11c19890d49f608e12c4a4c3a5d3c822bc..d6689106d2a83935ea6ac98fd89f42ce06132879 100644 (file)
@@ -20,9 +20,20 @@ &tpd12s015 {
 };
 
 &mmc1 {
+       pinctrl-names = "default", "hs";
+       pinctrl-0 = <&mmc1_pins_default>;
+       pinctrl-1 = <&mmc1_pins_hs>;
+
        vmmc-supply = <&ldo1_reg>;
 };
 
+&mmc2 {
+       pinctrl-names = "default", "hs", "ddr_1_8v";
+       pinctrl-0 = <&mmc2_pins_default>;
+       pinctrl-1 = <&mmc2_pins_hs>;
+       pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
+};
+
 /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
 &phy1 {
        max-speed = <100>;