drm/amd/display: Clear underflow status for debug purposes

We want to keep underflow sticky bit on for the longevity tests outside
of test environment. For debug purposes it is, however, useful to clear
underflow status after the test that caused it so that the following
tests are not affected. This change fullfils both requirements by clearing
the underflow only from within Windows or Diags test environment.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index c452972bf1c33c6818271a2e3bafa627c56ae012..f8e0576af6e0b327b9f685370b4c752f7ecd3d1c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -326,6 +326,12 @@ void dcn10_log_hw_state(struct dc *dc)
                                s.h_total,
                                s.v_total,
                                s.underflow_occurred_status);
+
+               // Clear underflow for debug purposes
+               // We want to keep underflow sticky bit on for the longevity tests outside of test environment.
+               // This function is called only from Windows or Diags test environment, hence it's safe to clear
+               // it from here without affecting the original intent.
+               tg->funcs->clear_optc_underflow(tg);
        }
        DTN_INFO("\n");