drm/amd/display: Refactor FPGA-specific link setup

FPGA doesn't program backend, so we don't need certain link settings
(audio stream for example).

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index bd58dbae7d3e0b1c8c7b2a82311bb2de2f02b8ec..9f9503a9b9aad0ed7439e3af78b9553c0ae02db2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2559,23 +2559,24 @@ void core_link_enable_stream(
                        pipe_ctx->stream_res.stream_enc,
                        &stream->timing);
 
-       resource_build_info_frame(pipe_ctx);
-       core_dc->hwss.update_info_frame(pipe_ctx);
-
-       /* eDP lit up by bios already, no need to enable again. */
-       if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
-                       pipe_ctx->stream->apply_edp_fast_boot_optimization) {
-               pipe_ctx->stream->apply_edp_fast_boot_optimization = false;
-               pipe_ctx->stream->dpms_off = false;
-               return;
-       }
+       if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) {
+               resource_build_info_frame(pipe_ctx);
+               core_dc->hwss.update_info_frame(pipe_ctx);
+
+               /* eDP lit up by bios already, no need to enable again. */
+               if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
+                               pipe_ctx->stream->apply_edp_fast_boot_optimization) {
+                       pipe_ctx->stream->apply_edp_fast_boot_optimization = false;
+                       pipe_ctx->stream->dpms_off = false;
+                       return;
+               }
 
-       if (pipe_ctx->stream->dpms_off)
-               return;
+               if (pipe_ctx->stream->dpms_off)
+                       return;
 
-       status = enable_link(state, pipe_ctx);
+               status = enable_link(state, pipe_ctx);
 
-       if (status != DC_OK) {
+               if (status != DC_OK) {
                        DC_LOG_WARNING("enabling link %u failed: %d\n",
                        pipe_ctx->stream->sink->link->link_index,
                        status);
@@ -2590,23 +2591,26 @@ void core_link_enable_stream(
                                BREAK_TO_DEBUGGER();
                                return;
                        }
-       }
+               }
 
-       core_dc->hwss.enable_audio_stream(pipe_ctx);
+               core_dc->hwss.enable_audio_stream(pipe_ctx);
 
-       /* turn off otg test pattern if enable */
-       if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)
-               pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
-                               CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
-                               COLOR_DEPTH_UNDEFINED);
+               /* turn off otg test pattern if enable */
+               if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)
+                       pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
+                                       CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
+                                       COLOR_DEPTH_UNDEFINED);
 
-       core_dc->hwss.enable_stream(pipe_ctx);
+               core_dc->hwss.enable_stream(pipe_ctx);
 
-       if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
-               allocate_mst_payload(pipe_ctx);
+               if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
+                       allocate_mst_payload(pipe_ctx);
+
+               core_dc->hwss.unblank_stream(pipe_ctx,
+                       &pipe_ctx->stream->sink->link->cur_link_settings);
+
+       }
 
-       core_dc->hwss.unblank_stream(pipe_ctx,
-               &pipe_ctx->stream->sink->link->cur_link_settings);
 }
 
 void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index dc1eed5ba996353017187b7deaa2c3d697b0664a..6b7cccc486d891ed1b7dc17526b8ab7483755271 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1377,26 +1377,13 @@ static enum dc_status apply_single_controller_ctx_to_hw(
        /*  */
        dc->hwss.enable_stream_timing(pipe_ctx, context, dc);
 
-       /* FPGA does not program backend */
-       if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
-               pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(
-               pipe_ctx->stream_res.opp,
-               COLOR_SPACE_YCBCR601,
-               stream->timing.display_color_depth,
-               pipe_ctx->stream->signal);
-
-               pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
-                       pipe_ctx->stream_res.opp,
-                       &stream->bit_depth_params,
-                       &stream->clamping);
-               return DC_OK;
-       }
        /* TODO: move to stream encoder */
        if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL)
                if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) {
                        BREAK_TO_DEBUGGER();
                        return DC_ERROR_UNEXPECTED;
                }
+
        pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(
                        pipe_ctx->stream_res.opp,
                        COLOR_SPACE_YCBCR601,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 6bd4ec39f86917bae66330031b80804104fd53f9..a881ff5559ecd2a717e28d723c75f065fbfd3df8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -44,6 +44,7 @@
 #include "dcn10_hubp.h"
 #include "dcn10_hubbub.h"
 #include "dcn10_cm_common.h"
+#include "dc_link_dp.h"
 
 #define DC_LOGGER_INIT(logger)