]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/nouveau/gr/gf100-: virtualise init_504430
authorBen Skeggs <bskeggs@redhat.com>
Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 18 May 2018 05:01:23 +0000 (15:01 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c

index 25f64ece92a4e26589e87552ab5c6deac3c00dfc..274ff014ab9e9d812ab48392df8547346b63833d 100644 (file)
@@ -2092,6 +2092,8 @@ gf100_gr_init(struct gf100_gr *gr)
                        if (gr->func->init_tex_hww_esr)
                                gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
+                       if (gr->func->init_504430)
+                               gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
                }
index 0bbe11dd8bddc704a75f6e6074e6b1d97dd03c18..81d5931eff325f9771d167fe816ca8f6ccd2f0bb 100644 (file)
@@ -139,6 +139,7 @@ struct gf100_gr_func {
        void (*init_419c9c)(struct gf100_gr *);
        void (*init_ppc_exceptions)(struct gf100_gr *);
        void (*init_tex_hww_esr)(struct gf100_gr *, int gpc, int tpc);
+       void (*init_504430)(struct gf100_gr *, int gpc, int tpc);
        void (*set_hww_esr_report_mask)(struct gf100_gr *);
        const struct gf100_gr_pack *mmio;
        struct {
@@ -175,6 +176,8 @@ void gk104_gr_init_sked_hww_esr(struct gf100_gr *);
 
 void gk110_gr_init_419eb4(struct gf100_gr *);
 
+void gm107_gr_init_504430(struct gf100_gr *, int, int);
+
 int gk20a_gr_init(struct gf100_gr *);
 
 int gm200_gr_rops(struct gf100_gr *);
index 8ee7723bfee4d3233c3c42f2b435d860b3820fe0..4c8c2561282b297e196ade0a0170d0a3da50a9f3 100644 (file)
@@ -281,6 +281,13 @@ gm107_gr_pack_mmio[] = {
  * PGRAPH engine/subdev functions
  ******************************************************************************/
 
+void
+gm107_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
+{
+       struct nvkm_device *device = gr->base.engine.subdev.device;
+       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+}
+
 static void
 gm107_gr_init_bios_2(struct gf100_gr *gr)
 {
@@ -395,7 +402,7 @@ gm107_gr_init(struct gf100_gr *gr)
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
                }
@@ -459,6 +466,7 @@ gm107_gr = {
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .mmio = gm107_gr_pack_mmio,
        .fecs.ucode = &gm107_gr_fecs_ucode,
        .gpccs.ucode = &gm107_gr_gpccs_ucode,
index 0d020098f6f3075ea544e230dc651fd76dc7071b..69f191ec78ab6bb2db141816cde45cbb5fe26b63 100644 (file)
@@ -123,7 +123,7 @@ gm200_gr_init(struct gf100_gr *gr)
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
                }
@@ -205,6 +205,7 @@ gm200_gr = {
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 2,
        .grctx = &gm200_grctx,
index c7986087a3dfa8f48f1b26efaefd999b832499be..76a9416fa4ede57ab857d6533158b667936d35d5 100644 (file)
@@ -103,7 +103,7 @@ gp100_gr_init(struct gf100_gr *gr)
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, gpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000105);
                }
@@ -145,6 +145,7 @@ gp100_gr = {
        .init_419c9c = gp100_gr_init_419c9c,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 2,
        .grctx = &gp100_grctx,
index a7fe2d9f48595ad7fdc399c97d368a5bea0843ff..7072578be6484b343bf72ee3ac109e868fd6d2a5 100644 (file)
@@ -55,6 +55,7 @@ gp102_gr = {
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 3,
        .grctx = &gp102_grctx,
index f085d01f36115f3aed5d5c4e865525a35b8ad5a3..f23f70f027e27882b07a0027a7b36867cde126a1 100644 (file)
@@ -41,6 +41,7 @@ gp107_gr = {
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 1,
        .grctx = &gp107_grctx,
index 9530edc837a93742ae0d41433697507f28ba08bd..0ff175960a36ca925ab8517019805a63071c8de0 100644 (file)
@@ -39,6 +39,7 @@ gp10b_gr = {
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 1,
        .grctx = &gp102_grctx,