drm/amd/display: reset hdmi tmds rate and data scramble on pipe reset

[why]
hdmi data scramble and tmds rate is not reset during pipe reset.

[how]
reset hdmi tmds rate and data scramble on pipe reset

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index 84bbff665be9831189eb3843cf0b49e2e434ee55..b87a265b93c6c7e49d175c9f02e7c852f395d130 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -1038,6 +1038,24 @@ static void dce110_stream_encoder_set_avmute(
 }
 
 
+static void dce110_reset_hdmi_stream_attribute(
+       struct stream_encoder *enc)
+{
+       struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
+       if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN)
+               REG_UPDATE_5(HDMI_CONTROL,
+                       HDMI_PACKET_GEN_VERSION, 1,
+                       HDMI_KEEPOUT_MODE, 1,
+                       HDMI_DEEP_COLOR_ENABLE, 0,
+                       HDMI_DATA_SCRAMBLE_EN, 0,
+                       HDMI_CLOCK_CHANNEL_RATE, 0);
+       else
+               REG_UPDATE_3(HDMI_CONTROL,
+                       HDMI_PACKET_GEN_VERSION, 1,
+                       HDMI_KEEPOUT_MODE, 1,
+                       HDMI_DEEP_COLOR_ENABLE, 0);
+}
+
 #define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000
 #define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
 
@@ -1618,6 +1636,7 @@ static const struct stream_encoder_funcs dce110_str_enc_funcs = {
        .setup_stereo_sync  = setup_stereo_sync,
        .set_avmute = dce110_stream_encoder_set_avmute,
        .dig_connect_to_otg  = dig_connect_to_otg,
+       .hdmi_reset_stream_attribute = dce110_reset_hdmi_stream_attribute,
 };
 
 void dce110_stream_encoder_construct(

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 9c50f09233bbfff459786e9a458128137f2792a4..9976155825283ad9a6e1095836014676c4c6f195 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1040,9 +1040,12 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option)
        struct dc_link *link = stream->link;
        struct dc *dc = pipe_ctx->stream->ctx->dc;
 
-       if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
+       if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {
                pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets(
                        pipe_ctx->stream_res.stream_enc);
+               pipe_ctx->stream_res.stream_enc->funcs->hdmi_reset_stream_attribute(
+                       pipe_ctx->stream_res.stream_enc);
+       }
 
        if (dc_is_dp_signal(pipe_ctx->stream->signal))
                pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index 89e6a4c34018bbd7483c9095757265ac481d4234..c2bba881bd38b86a124291c0d870ee8da886334b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -1004,6 +1004,19 @@ void enc1_stream_encoder_set_avmute(
        REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);
 }
 
+void enc1_reset_hdmi_stream_attribute(
+       struct stream_encoder *enc)
+{
+       struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
+
+       REG_UPDATE_5(HDMI_CONTROL,
+               HDMI_PACKET_GEN_VERSION, 1,
+               HDMI_KEEPOUT_MODE, 1,
+               HDMI_DEEP_COLOR_ENABLE, 0,
+               HDMI_DATA_SCRAMBLE_EN, 0,
+               HDMI_CLOCK_CHANNEL_RATE, 0);
+}
+
 
 #define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000
 #define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
@@ -1563,6 +1576,7 @@ static const struct stream_encoder_funcs dcn10_str_enc_funcs = {
        .setup_stereo_sync  = enc1_setup_stereo_sync,
        .set_avmute = enc1_stream_encoder_set_avmute,
        .dig_connect_to_otg  = enc1_dig_connect_to_otg,
+       .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,
 };
 
 void dcn10_stream_encoder_construct(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
index f585e7b620cc2b55a6d55da0cb837748e295822d..8b8921e75984de9f3482342cb17920e6e81b38db 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
@@ -615,4 +615,7 @@ void get_audio_clock_info(
        uint32_t actual_pixel_clock_100Hz,
        struct audio_clock_info *audio_clock_info);
 
+void enc1_reset_hdmi_stream_attribute(
+       struct stream_encoder *enc);
+
 #endif /* __DC_STREAM_ENCODER_DCN10_H__ */

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
index 5c2b7b54b1262a8146a4a1c49929d08eb9bc2f7a..45df7f56afaf4ef27205572d7e126505101d82b4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
@@ -588,6 +588,7 @@ static const struct stream_encoder_funcs dcn20_str_enc_funcs = {
        .dp_set_dsc_config = enc2_dp_set_dsc_config,
 #endif
        .set_dynamic_metadata = enc2_set_dynamic_metadata,
+       .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,
 };
 
 void dcn20_stream_encoder_construct(

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index ed7d9588b30997fe27ce8baf2ef5591bd321ea9a..38e2c3e7412e75d9feb437b733d313dad1176881 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -211,6 +211,9 @@ struct stream_encoder_funcs {
                struct stream_encoder *enc,
                int tg_inst);
 
+       void (*hdmi_reset_stream_attribute)(
+               struct stream_encoder *enc);
+
 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
        void (*dp_set_dsc_config)(

diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
index c9a6dd878d9b661e50f0174c1976bf6e2aee94e3..ff664bdb1482883a4a4d3692d32b33c38a3bd010 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
@@ -77,6 +77,10 @@ static void virtual_audio_mute_control(
        struct stream_encoder *enc,
        bool mute) {}
 
+static void virtual_stream_encoder_reset_hdmi_stream_attribute(
+               struct stream_encoder *enc)
+{}
+
 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 static void virtual_enc_dp_set_odm_combine(
@@ -116,6 +120,7 @@ static const struct stream_encoder_funcs virtual_str_enc_funcs = {
 
        .audio_mute_control = virtual_audio_mute_control,
        .set_avmute = virtual_stream_encoder_set_avmute,
+       .hdmi_reset_stream_attribute = virtual_stream_encoder_reset_hdmi_stream_attribute,
 };
 
 bool virtual_stream_encoder_construct(