drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/a

Give a proper name for the GMBUS clock gating disable bit on PNV,
and rename intel_i2c_quirk_set() to pnv_gmbus_clock_gating() for
clarity.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-3-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 268bbd0eaaa4439fc4d2c361d53932bc14cb5035..fb05849eabab4c2375d7f4194e9e6a2a10959b7e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3278,6 +3278,7 @@ enum i915_power_well_id {
 # define AUDUNIT_CLOCK_GATE_DISABLE            (1 << 26) /* 965 */
 # define DPUNIT_A_CLOCK_GATE_DISABLE           (1 << 25) /* 965 */
 # define DPCUNIT_CLOCK_GATE_DISABLE            (1 << 24) /* 965 */
+# define PNV_GMBUSUNIT_CLOCK_GATE_DISABLE      (1 << 24) /* pnv */
 # define TVRUNIT_CLOCK_GATE_DISABLE            (1 << 23) /* 915-945 */
 # define TVCUNIT_CLOCK_GATE_DISABLE            (1 << 22) /* 915-945 */
 # define TVFUNIT_CLOCK_GATE_DISABLE            (1 << 21) /* 915-945 */

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 49fdf09f9919c8f29d85f83ee0f3f731796f7713..a8c08994f505ee61a1fd9bf25f42e9a15014b522 100644 (file)
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -128,19 +128,17 @@ intel_i2c_reset(struct drm_i915_private *dev_priv)
        I915_WRITE(GMBUS4, 0);
 }
 
-static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)
+static void pnv_gmbus_clock_gating(struct drm_i915_private *dev_priv,
+                                  bool enable)
 {
        u32 val;
 
        /* When using bit bashing for I2C, this bit needs to be set to 1 */
-       if (!IS_PINEVIEW(dev_priv))
-               return;
-
        val = I915_READ(DSPCLK_GATE_D);
-       if (enable)
-               val |= DPCUNIT_CLOCK_GATE_DISABLE;
+       if (!enable)
+               val |= PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;
        else
-               val &= ~DPCUNIT_CLOCK_GATE_DISABLE;
+               val &= ~PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;
        I915_WRITE(DSPCLK_GATE_D, val);
 }
 
@@ -221,7 +219,10 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
        struct drm_i915_private *dev_priv = bus->dev_priv;
 
        intel_i2c_reset(dev_priv);
-       intel_i2c_quirk_set(dev_priv, true);
+
+       if (IS_PINEVIEW(dev_priv))
+               pnv_gmbus_clock_gating(dev_priv, false);
+
        set_data(bus, 1);
        set_clock(bus, 1);
        udelay(I2C_RISEFALL_TIME);
@@ -238,7 +239,9 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
 
        set_data(bus, 1);
        set_clock(bus, 1);
-       intel_i2c_quirk_set(dev_priv, false);
+
+       if (IS_PINEVIEW(dev_priv))
+               pnv_gmbus_clock_gating(dev_priv, true);
 }
 
 static void