ARM: dts: r8a7778: Add HSCIF0/1 support

Add HSCIF0/1 clocks and device nodes, based on Rev. 1.00 of the R-Car
M1A datasheet.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Squashed two patches]
[geert: Correct HSCIF1 module clock index]
[geert: Correct reg properties for non-LPAE]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 05db0ccad7a6b745f172d78288d7a77a4a4a873c..10d996d2941fe6eaa2672ae55b5b34621b2c46e7 100644 (file)
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -367,6 +367,30 @@ scif5: serial@ffe45000 {
                status = "disabled";
        };
 
+       hscif0: serial@ffe48000 {
+               compatible = "renesas,hscif-r8a7778",
+                            "renesas,rcar-gen1-hscif", "renesas,hscif";
+               reg = <0xffe48000 96>;
+               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_HSCIF0>,
+                        <&cpg_clocks R8A7778_CLK_S>, <&scif_clk>;
+               clock-names = "fck", "brg_int", "scif_clk";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
+       hscif1: serial@ffe49000 {
+               compatible = "renesas,hscif-r8a7778",
+                            "renesas,rcar-gen1-hscif", "renesas,hscif";
+               reg = <0xffe49000 96>;
+               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_HSCIF1>,
+                        <&cpg_clocks R8A7778_CLK_S>, <&scif_clk>;
+               clock-names = "fck", "brg_int", "scif_clk";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
        mmcif: mmc@ffe4e000 {
                compatible = "renesas,mmcif-r8a7778", "renesas,sh-mmcif";
                reg = <0xffe4e000 0x100>;
@@ -535,6 +559,8 @@ mstp0_clks: mstp0_clks@ffc80030 {
                                 <&cpg_clocks R8A7778_CLK_P>,
                                 <&cpg_clocks R8A7778_CLK_P>,
                                 <&cpg_clocks R8A7778_CLK_P>,
+                                <&cpg_clocks R8A7778_CLK_S>,
+                                <&cpg_clocks R8A7778_CLK_S>,
                                 <&cpg_clocks R8A7778_CLK_P>,
                                 <&cpg_clocks R8A7778_CLK_P>,
                                 <&cpg_clocks R8A7778_CLK_P>,
@@ -551,6 +577,7 @@ R8A7778_CLK_I2C2 R8A7778_CLK_I2C3
                                R8A7778_CLK_SCIF0 R8A7778_CLK_SCIF1
                                R8A7778_CLK_SCIF2 R8A7778_CLK_SCIF3
                                R8A7778_CLK_SCIF4 R8A7778_CLK_SCIF5
+                               R8A7778_CLK_HSCIF0 R8A7778_CLK_HSCIF1
                                R8A7778_CLK_TMU0 R8A7778_CLK_TMU1
                                R8A7778_CLK_TMU2 R8A7778_CLK_SSI0
                                R8A7778_CLK_SSI1 R8A7778_CLK_SSI2
@@ -560,6 +587,7 @@ R8A7778_CLK_HSPI
                        clock-output-names =
                                "i2c0", "i2c1", "i2c2", "i2c3", "scif0",
                                "scif1", "scif2", "scif3", "scif4", "scif5",
+                               "hscif0", "hscif1",
                                "tmu0", "tmu1", "tmu2", "ssi0", "ssi1",
                                "ssi2", "ssi3", "sru", "hspi";
                };

diff --git a/include/dt-bindings/clock/r8a7778-clock.h b/include/dt-bindings/clock/r8a7778-clock.h
index f6b07c5399dec1f9a3c42c6990cb54f3785a69b5..d0bff9ec5c66baf191c22e1560051db5194dfb30 100644 (file)
--- a/include/dt-bindings/clock/r8a7778-clock.h
+++ b/include/dt-bindings/clock/r8a7778-clock.h
@@ -30,6 +30,8 @@
 #define R8A7778_CLK_SCIF3      23
 #define R8A7778_CLK_SCIF4      22
 #define R8A7778_CLK_SCIF5      21
+#define R8A7778_CLK_HSCIF0     19
+#define R8A7778_CLK_HSCIF1     18
 #define R8A7778_CLK_TMU0       16
 #define R8A7778_CLK_TMU1       15
 #define R8A7778_CLK_TMU2       14