]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: Add nodes for pdma0 and pdma1 for exynos7
authorAlim Akhtar <alim.akhtar@samsung.com>
Wed, 13 Apr 2016 04:42:03 +0000 (10:12 +0530)
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>
Wed, 13 Apr 2016 09:31:44 +0000 (11:31 +0200)
This patch adds device tree nodes for pdma0 and pdma1 controllers
found on exynos7 SoCs.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
arch/arm64/boot/dts/exynos/exynos7.dtsi

index 2450d0a06da5c47ee9d67ed2faa7bea6d3304fec..ca663dfe51891f11e4cd2964048c3590a6e330fe 100644 (file)
@@ -96,6 +96,35 @@ gic: interrupt-controller@11001000 {
                                <0x11006000 0x2000>;
                };
 
+               amba {
+                       compatible = "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       pdma0: pdma@10E10000 {
+                               compatible = "arm,pl330", "arm,primecell";
+                               reg = <0x10E10000 0x1000>;
+                               interrupts = <0 225 0>;
+                               clocks = <&clock_fsys0 ACLK_PDMA0>;
+                               clock-names = "apb_pclk";
+                               #dma-cells = <1>;
+                               #dma-channels = <8>;
+                               #dma-requests = <32>;
+                       };
+
+                       pdma1: pdma@10EB0000 {
+                               compatible = "arm,pl330", "arm,primecell";
+                               reg = <0x10EB0000 0x1000>;
+                               interrupts = <0 226 0>;
+                               clocks = <&clock_fsys0 ACLK_PDMA1>;
+                               clock-names = "apb_pclk";
+                               #dma-cells = <1>;
+                               #dma-channels = <8>;
+                               #dma-requests = <32>;
+                       };
+               };
+
                clock_topc: clock-controller@10570000 {
                        compatible = "samsung,exynos7-clock-topc";
                        reg = <0x10570000 0x10000>;