]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ath9k: Remove unused workaround
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Mon, 12 Nov 2012 05:26:44 +0000 (10:56 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 16 Nov 2012 19:11:14 +0000 (14:11 -0500)
The workaround for ASPM/L0s is needed only for AR9485 1.0,
which was never sold and is not supported by ath9k.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h
drivers/net/wireless/ath/ath9k/main.c
drivers/net/wireless/ath/ath9k/pci.c

index 71cd9f0c96af35e7b643c91d7b0b380685802db6..756191b9eedaf7c3c6b32a7c4acc548610fa9b75 100644 (file)
@@ -2561,11 +2561,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                        pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;
        }
 
-       if (AR_SREV_9485_10(ah)) {
-               pCap->pcie_lcr_extsync_en = true;
-               pCap->pcie_lcr_offset = 0x80;
-       }
-
        if (ath9k_hw_dfs_tested(ah))
                pCap->hw_caps |= ATH9K_HW_CAP_DFS;
 
index 3e73bfe2315e2dfbb94f442599355105b7cf10bb..bdabbda5a83e0476fbedec4279867efb9fb67c90 100644 (file)
@@ -273,8 +273,6 @@ struct ath9k_hw_capabilities {
        u8 rx_status_len;
        u8 tx_desc_len;
        u8 txs_len;
-       u16 pcie_lcr_offset;
-       bool pcie_lcr_extsync_en;
 };
 
 struct ath9k_ops_config {
@@ -930,7 +928,6 @@ struct ath_bus_ops {
        void (*read_cachesize)(struct ath_common *common, int *csz);
        bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
        void (*bt_coex_prep)(struct ath_common *common);
-       void (*extn_synch_en)(struct ath_common *common);
        void (*aspm_init)(struct ath_common *common);
 };
 
index c084532291a1ec7efcd3237a394aa5f6440de318..9594b6fcdf06317fcbd7f24e226a847f575b1a13 100644 (file)
@@ -686,9 +686,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
 
        spin_unlock_bh(&sc->sc_pcu_lock);
 
-       if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
-               common->bus_ops->extn_synch_en(common);
-
        mutex_unlock(&sc->mutex);
 
        ath9k_ps_restore(sc);
index f088f4bf9a26a0802ca4526dce91b48213fdd09f..9553203ee6248dcd80fe9234902a61902fb6286a 100644 (file)
@@ -96,17 +96,6 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
        return true;
 }
 
-static void ath_pci_extn_synch_enable(struct ath_common *common)
-{
-       struct ath_softc *sc = (struct ath_softc *) common->priv;
-       struct pci_dev *pdev = to_pci_dev(sc->dev);
-       u8 lnkctl;
-
-       pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
-       lnkctl |= PCI_EXP_LNKCTL_ES;
-       pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
-}
-
 /* Need to be called after we discover btcoex capabilities */
 static void ath_pci_aspm_init(struct ath_common *common)
 {
@@ -153,7 +142,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = {
        .ath_bus_type = ATH_PCI,
        .read_cachesize = ath_pci_read_cachesize,
        .eeprom_read = ath_pci_eeprom_read,
-       .extn_synch_en = ath_pci_extn_synch_enable,
        .aspm_init = ath_pci_aspm_init,
 };