]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
can: sja1000: of: add reg-io-width property for 8, 16 and 32-bit register access
authorFlorian Vaussard <florian.vaussard@epfl.ch>
Fri, 31 Jan 2014 13:34:37 +0000 (14:34 +0100)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Thu, 6 Feb 2014 10:50:57 +0000 (11:50 +0100)
Add the 'reg-io-width' property for 8, 16 and 32-bit access, like
what is currently done with IORESOURCE_MEM_{8,16,32}BIT for non-OF
boot.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Andreas Larsson <andreas@gaisler.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
drivers/net/can/sja1000/sja1000_platform.c

index b7fbe4f5772030f476ccf81c0bbb920f9510fb4b..95a844a7ee7b0befa46e7d6dd9704c9ad99fac8b 100644 (file)
@@ -101,8 +101,24 @@ static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)
        int err;
        u32 prop;
 
-       priv->read_reg = sp_read_reg8;
-       priv->write_reg = sp_write_reg8;
+       err = of_property_read_u32(of, "reg-io-width", &prop);
+       if (err)
+               prop = 1; /* 8 bit is default */
+
+       switch (prop) {
+       case 4:
+               priv->read_reg = sp_read_reg32;
+               priv->write_reg = sp_write_reg32;
+               break;
+       case 2:
+               priv->read_reg = sp_read_reg16;
+               priv->write_reg = sp_write_reg16;
+               break;
+       case 1: /* fallthrough */
+       default:
+               priv->read_reg = sp_read_reg8;
+               priv->write_reg = sp_write_reg8;
+       }
 
        err = of_property_read_u32(of, "nxp,external-clock-frequency", &prop);
        if (!err)