RDMA/hns: Add sq_invld_flg field in QP context

In hip08 RoCE, it need to add the sq_invld_flg field
in QP context for RoCE hardware.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Shaobo Xu <xushaobo2@huawei.com>
Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index d74a5220d82647bca88df9f376cc69d9a7c18c9c..c1f33251a73cb01cfe2793fb6ec55121e9250e83 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2042,6 +2042,8 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp,
 
        roce_set_bit(qpc_mask->byte_168_irrl_idx,
                     V2_QPC_BYTE_168_MSG_RTY_LP_FLG_S, 0);
+       roce_set_bit(qpc_mask->byte_168_irrl_idx,
+                    V2_QPC_BYTE_168_SQ_INVLD_FLG_S, 0);
        roce_set_field(qpc_mask->byte_168_irrl_idx,
                       V2_QPC_BYTE_168_IRRL_IDX_LSB_M,
                       V2_QPC_BYTE_168_IRRL_IDX_LSB_S, 0);

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 3d9114ee01540d4b2d3376702265f9a19c006ddc..04b7a51b8efb0fa9b843d4aba51921b8069d3779 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -606,8 +606,10 @@ struct hns_roce_v2_qp_context {
 
 #define V2_QPC_BYTE_168_MSG_RTY_LP_FLG_S 20
 
-#define        V2_QPC_BYTE_168_LP_SGEN_INI_S 21
-#define V2_QPC_BYTE_168_LP_SGEN_INI_M GENMASK(23, 21)
+#define V2_QPC_BYTE_168_SQ_INVLD_FLG_S 21
+
+#define        V2_QPC_BYTE_168_LP_SGEN_INI_S 22
+#define V2_QPC_BYTE_168_LP_SGEN_INI_M GENMASK(23, 22)
 
 #define        V2_QPC_BYTE_168_SQ_SHIFT_BAK_S 24
 #define V2_QPC_BYTE_168_SQ_SHIFT_BAK_M GENMASK(27, 24)