]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: rockchip: add pinctrl settings for some rk3399 peripherals
authorKever Yang <kever.yang@rock-chips.com>
Wed, 12 Apr 2017 07:10:44 +0000 (15:10 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 23 May 2017 08:33:49 +0000 (10:33 +0200)
Add pinctrl for sdio, sdmmc, pcie, spdif, hdmi.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 387ae34fb25a2f35cf192808f7741cd128bede42..25cb51dd10c5a242c1d23277efb7af94bb6eca64 100644 (file)
@@ -1711,6 +1711,91 @@ i2s1_2ch_bus: i2s1-2ch-bus {
                        };
                };
 
+               sdio0 {
+                       sdio0_bus1: sdio0-bus1 {
+                               rockchip,pins =
+                                       <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_bus4: sdio0-bus4 {
+                               rockchip,pins =
+                                       <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
+                                       <2 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
+                                       <2 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+                                       <2 RK_PC7 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_cmd: sdio0-cmd {
+                               rockchip,pins =
+                                       <2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_clk: sdio0-clk {
+                               rockchip,pins =
+                                       <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+
+                       sdio0_cd: sdio0-cd {
+                               rockchip,pins =
+                                       <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_pwr: sdio0-pwr {
+                               rockchip,pins =
+                                       <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_bkpwr: sdio0-bkpwr {
+                               rockchip,pins =
+                                       <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_wp: sdio0-wp {
+                               rockchip,pins =
+                                       <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdio0_int: sdio0-int {
+                               rockchip,pins =
+                                       <0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+               };
+
+               sdmmc {
+                       sdmmc_bus1: sdmmc-bus1 {
+                               rockchip,pins =
+                                       <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdmmc_bus4: sdmmc-bus4 {
+                               rockchip,pins =
+                                       <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
+                                       <4 RK_PB1 RK_FUNC_1 &pcfg_pull_up>,
+                                       <4 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
+                                       <4 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdmmc_clk: sdmmc-clk {
+                               rockchip,pins =
+                                       <4 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+
+                       sdmmc_cmd: sdmmc-cmd {
+                               rockchip,pins =
+                                       <4 RK_PB5 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdmmc_cd: sdmcc-cd {
+                               rockchip,pins =
+                                       <0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+
+                       sdmmc_wp: sdmmc-wp {
+                               rockchip,pins =
+                                       <0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+                       };
+               };
+
                sleep {
                        ap_pwroff: ap-pwroff {
                                rockchip,pins = <1 5 RK_FUNC_1 &pcfg_pull_none>;
@@ -1726,6 +1811,11 @@ spdif_bus: spdif-bus {
                                rockchip,pins =
                                        <4 21 RK_FUNC_1 &pcfg_pull_none>;
                        };
+
+                       spdif_bus_1: spdif-bus-1 {
+                               rockchip,pins =
+                                       <3 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+                       };
                };
 
                spi0 {
@@ -1985,6 +2075,19 @@ pwm3b_pin: pwm3b-pin {
                        };
                };
 
+               hdmi {
+                       hdmi_i2c_xfer: hdmi-i2c-xfer {
+                               rockchip,pins =
+                                       <4 RK_PC1 RK_FUNC_3 &pcfg_pull_none>,
+                                       <4 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+                       };
+
+                       hdmi_cec: hdmi-cec {
+                               rockchip,pins =
+                                       <4 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                pcie {
                        pcie_clkreqn: pci-clkreqn {
                                rockchip,pins =
@@ -1995,6 +2098,16 @@ pcie_clkreqnb: pci-clkreqnb {
                                rockchip,pins =
                                        <4 24 RK_FUNC_1 &pcfg_pull_none>;
                        };
+
+                       pcie_clkreqn_cpm: pci-clkreqn-cpm {
+                               rockchip,pins =
+                                       <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
+
+                       pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
+                               rockchip,pins =
+                                       <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
                };
 
        };