]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: update Polaris11 golden setting
authorFlora Cui <Flora.Cui@amd.com>
Tue, 17 May 2016 01:52:22 +0000 (09:52 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 May 2016 13:22:29 +0000 (09:22 -0400)
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

index 486207342ecf80381684175e1957aaa036e383df..cd2ec816b485002e7a307c857013b84dc138aaa7 100644 (file)
@@ -137,7 +137,7 @@ static const u32 polaris11_golden_settings_a11[] =
        mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
        mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
        mmFBC_DEBUG1, 0xffffffff, 0x00000008,
-       mmFBC_MISC, 0x9f313fff, 0x14300008,
+       mmFBC_MISC, 0x9f313fff, 0x14302008,
        mmHDMI_CONTROL, 0x313f031f, 0x00000011,
 };
 
index 3e97e1e023cb9cb06d6e8d6de90da7488eaa47ce..f19bab68fd837ffe3cacb54ef04f9d50dc8fee27 100644 (file)
@@ -267,10 +267,13 @@ static const u32 tonga_mgcg_cgcg_init[] =
 
 static const u32 golden_settings_polaris11_a11[] =
 {
+       mmCB_HW_CONTROL, 0xfffdf3cf, 0x00006208,
        mmCB_HW_CONTROL_3, 0x000001ff, 0x00000040,
        mmDB_DEBUG2, 0xf00fffff, 0x00000400,
        mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
        mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000,
+       mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012,
+       mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
        mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0001003c,
        mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
        mmSQ_CONFIG, 0x07f80000, 0x07180000,
@@ -284,8 +287,6 @@ static const u32 golden_settings_polaris11_a11[] =
 static const u32 polaris11_golden_common_all[] =
 {
        mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
-       mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
-       mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
        mmGB_ADDR_CONFIG, 0xffffffff, 0x22011002,
        mmSPI_RESOURCE_RESERVE_CU_0, 0xffffffff, 0x00000800,
        mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
index 063f08a9957a1e96ecb82316fe479abe38dfc082..31d99b0010f79a032540b06cf0bc3c04d498f78c 100644 (file)
@@ -109,10 +109,12 @@ static const u32 fiji_mgcg_cgcg_init[] =
 static const u32 golden_settings_polaris11_a11[] =
 {
        mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007,
+       mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000,
        mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
        mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
        mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
        mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007,
+       mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000,
        mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
        mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
        mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,