]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: Add some initial IXP4xx device trees
authorLinus Walleij <linus.walleij@linaro.org>
Sun, 27 Jan 2019 13:11:41 +0000 (14:11 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 23 Apr 2019 14:02:15 +0000 (16:02 +0200)
This adds a device tree for the IXP4xx-based Linksys
NSLU2 and Gateworks GW2358 which encompass the Gateworks
Cambria family.

These will be the first IXP4xx device tree platforms.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts [new file with mode: 0644]
arch/arm/boot/dts/intel-ixp42x.dtsi [new file with mode: 0644]
arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts [new file with mode: 0644]
arch/arm/boot/dts/intel-ixp43x.dtsi [new file with mode: 0644]
arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi [new file with mode: 0644]
arch/arm/boot/dts/intel-ixp4xx.dtsi [new file with mode: 0644]

index f4f5aeaf32985c3f5a5bebe88751e90a16311892..7af4e3289a89434290119876212b13302ed25ce1 100644 (file)
@@ -229,6 +229,9 @@ dtb-$(CONFIG_ARCH_HIX5HD2) += \
 dtb-$(CONFIG_ARCH_INTEGRATOR) += \
        integratorap.dtb \
        integratorcp.dtb
+dtb-$(CONFIG_ARCH_IXP4XX) += \
+       intel-ixp42x-linksys-nslu2.dtb \
+       intel-ixp43x-gateworks-gw2358.dtb
 dtb-$(CONFIG_ARCH_KEYSTONE) += \
        keystone-k2hk-evm.dtb \
        keystone-k2l-evm.dtb \
diff --git a/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts b/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
new file mode 100644 (file)
index 0000000..8fcd958
--- /dev/null
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Linksys NSLU2
+ */
+
+/dts-v1/;
+
+#include "intel-ixp42x.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
+       compatible = "linksys,nslu2", "intel,ixp42x";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       memory@0 {
+               /* 32 MB SDRAM */
+               device_type = "memory";
+               reg = <0x00000000 0x2000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
+               stdout-path = "uart0:115200n8";
+       };
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               led-status {
+                       label = "nslu2:red:status";
+                       gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+               led-ready {
+                       label = "nslu2:green:ready";
+                       gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+               led-disk-1 {
+                       label = "nslu2:green:disk-1";
+                       gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+                       default-state = "off";
+               };
+               led-disk-2 {
+                       label = "nslu2:green:disk-2";
+                       gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+                       default-state = "off";
+               };
+       };
+
+       gpio_keys {
+               compatible = "gpio-keys";
+
+               button-power {
+                       wakeup-source;
+                       linux,code = <KEY_POWER>;
+                       label = "power";
+                       gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+               };
+               button-reset {
+                       wakeup-source;
+                       linux,code = <KEY_ESC>;
+                       label = "reset";
+                       gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       i2c {
+               compatible = "i2c-gpio";
+               sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rtc@6f {
+                       compatible = "xicor,x1205";
+                       reg = <0x6f>;
+               };
+       };
+
+       gpio-poweroff {
+               compatible = "gpio-poweroff";
+               gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+               timeout-ms = <5000>;
+       };
+
+       /* The first 16MB region on the expansion bus */
+       flash@50000000 {
+               compatible = "intel,ixp4xx-flash", "cfi-flash";
+               bank-width = <2>;
+               /*
+                * 8 MB of Flash in 0x20000 byte blocks
+                * mapped in at 0x50000000
+                */
+               reg = <0x50000000 0x800000>;
+
+               partitions {
+                       compatible = "redboot-fis";
+                       /* Eraseblock at 0x7e0000 */
+                       fis-index-block = <0x3f>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/intel-ixp42x.dtsi b/arch/arm/boot/dts/intel-ixp42x.dtsi
new file mode 100644 (file)
index 0000000..a9622ca
--- /dev/null
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Intel XScale Network Processors
+ * in the IXP 42x series. This series has 32 interrupts.
+ */
+#include "intel-ixp4xx.dtsi"
+
+/ {
+       soc {
+               interrupt-controller@c8003000 {
+                       compatible = "intel,ixp42x-interrupt";
+               };
+
+               /*
+                * This is the USB Device Mode (UDC) controller, which is used
+                * to present the IXP4xx as a device on a USB bus.
+                */
+               usb@c800b000 {
+                       compatible = "intel,ixp4xx-udc";
+                       reg = <0xc800b000 0x1000>;
+                       interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
new file mode 100644 (file)
index 0000000..ba1163a
--- /dev/null
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Gateworks IXP43x-based Cambria GW2358
+ */
+
+/dts-v1/;
+
+#include "intel-ixp43x.dtsi"
+
+/ {
+       model = "Gateworks Cambria GW2358";
+       compatible = "gateworks,gw2358", "intel,ixp43x";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       memory@0 {
+               /* 128 MB SDRAM */
+               device_type = "memory";
+               reg = <0x00000000 0x8000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
+               stdout-path = "uart0:115200n8";
+       };
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               led-user {
+                       label = "gw2358:green:LED";
+                       gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+
+
+       i2c {
+               compatible = "i2c-gpio";
+               sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               hwmon@28 {
+                       compatible = "adi,ad7418";
+                       reg = <0x28>;
+               };
+               rtc: ds1672@68 {
+                       compatible = "dallas,ds1672";
+                       reg = <0x68>;
+               };
+               eeprom@51 {
+                       compatible = "atmel,24c08";
+                       reg = <0x51>;
+                       pagesize = <16>;
+                       size = <1024>;
+                       read-only;
+               };
+               pld0: pld@56 {
+                       compatible = "gateworks,pld-gpio";
+                       reg = <0x56>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+               /* This PLD just handles the LED and user button */
+               pld1: pld@57 {
+                       compatible = "gateworks,pld-gpio";
+                       reg = <0x57>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+       };
+
+       flash@50000000 {
+               compatible = "intel,ixp4xx-flash", "cfi-flash";
+               bank-width = <2>;
+               /*
+                * 32 MB of Flash in 0x20000 byte blocks
+                * mapped in at 0x50000000
+                */
+               reg = <0x50000000 0x2000000>;
+
+               partitions {
+                       compatible = "redboot-fis";
+                       /* Eraseblock at 0x1fe0000 */
+                       fis-index-block = <0xff>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/intel-ixp43x.dtsi b/arch/arm/boot/dts/intel-ixp43x.dtsi
new file mode 100644 (file)
index 0000000..494fb2f
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Intel XScale Network Processors
+ * in the IXP 43x series. This series has 64 interrupts and adds a few more
+ * peripherals over the 42x series.
+ */
+#include "intel-ixp4xx.dtsi"
+
+/ {
+       soc {
+               interrupt-controller@c8003000 {
+                       compatible = "intel,ixp43x-interrupt";
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi
new file mode 100644 (file)
index 0000000..f8cd506
--- /dev/null
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Intel XScale Network Processors
+ * in the IXP45x and IXP46x series. This series has 64 interrupts and adds a
+ * few more peripherals over the 42x and 43x series so this extends the
+ * basic IXP4xx DTSI.
+ */
+#include "intel-ixp4xx.dtsi"
+
+/ {
+       soc {
+               interrupt-controller@c8003000 {
+                       compatible = "intel,ixp43x-interrupt";
+               };
+
+               /*
+                * This is the USB Device Mode (UDC) controller, which is used
+                * to present the IXP4xx as a device on a USB bus.
+                */
+               usb@c800b000 {
+                       compatible = "intel,ixp4xx-udc";
+                       reg = <0xc800b000 0x1000>;
+                       interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+
+               i2c@c8011000 {
+                       compatible = "intel,ixp4xx-i2c";
+                       reg = <0xc8011000 0x18>;
+                       interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi
new file mode 100644 (file)
index 0000000..9edd495
--- /dev/null
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Device Tree file for Intel XScale Network Processors
+ * in the IXP 4xx series.
+ */
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       soc {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               compatible = "simple-bus";
+               interrupt-parent = <&intcon>;
+
+               uart0: serial@c8000000 {
+                       compatible = "intel,xscale-uart";
+                       reg = <0xc8000000 0x1000>;
+                       /*
+                        * The reg-offset and reg-shift is a side effect
+                        * of running the platform in big endian mode.
+                        */
+                       reg-offset = <3>;
+                       reg-shift = <2>;
+                       interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <14745600>;
+                       no-loopback-test;
+               };
+
+               gpio0: gpio@c8004000 {
+                       compatible = "intel,ixp4xx-gpio";
+                       reg = <0xc8004000 0x1000>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               intcon: interrupt-controller@c8003000 {
+                       /*
+                        * Note: no compatible string. The subvariant of the
+                        * chip needs to define what version it is. The
+                        * location of the interrupt controller is fixed in
+                        * memory across all variants.
+                        */
+                       reg = <0xc8003000 0x100>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               timer@c8005000 {
+                       compatible = "intel,ixp4xx-timer";
+                       reg = <0xc8005000 0x100>;
+                       interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+               };
+       };
+};