ARM: dts: r8a7790: Fix sort order of VSP1/FDP1 nodes

Commit 5d3b50d3c04d ("ARM: dts: renesas: r8a7790: Add FDP1 instances")
introduced the FDP1 for the r8a7790, but broke the sort ordering of the
device tree nodes.

Move the last VSP up to it's peers to correct the ordering.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0f1948d560d7582e26f12e882f3af0196cd2b835..b64d99e3ad9d8bea2cd9aa1fbf669f5556707f40 100644 (file)
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1616,6 +1616,15 @@ vsp@fe930000 {
                        resets = <&cpg 128>;
                };
 
+               vsp@fe938000 {
+                       compatible = "renesas,vsp1";
+                       reg = <0 0xfe938000 0 0x8000>;
+                       interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 127>;
+                       power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+                       resets = <&cpg 127>;
+               };
+
                fdp1@fe940000 {
                        compatible = "renesas,fdp1";
                        reg = <0 0xfe940000 0 0x2400>;
@@ -1643,15 +1652,6 @@ fdp1@fe948000 {
                        resets = <&cpg 117>;
                };
 
-               vsp@fe938000 {
-                       compatible = "renesas,vsp1";
-                       reg = <0 0xfe938000 0 0x8000>;
-                       interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 127>;
-                       power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
-                       resets = <&cpg 127>;
-               };
-
                jpu: jpeg-codec@fe980000 {
                        compatible = "renesas,jpu-r8a7790",
                                     "renesas,rcar-gen2-jpu";