]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: renesas: r8a7795: Add CPEX clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Nov 2018 09:43:16 +0000 (10:43 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 4 Dec 2018 09:29:41 +0000 (10:29 +0100)
Implement support for the CPEX clock on R-Car H3.  This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/renesas/r8a7795-cpg-mssr.c

index 119c024407263568e89d0a66bcf89be8a6259c43..86842c9fd314e9241da9cabc1edf8461d9e05550 100644 (file)
@@ -104,6 +104,7 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
        DEF_FIXED("cl",         R8A7795_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
        DEF_FIXED("cr",         R8A7795_CLK_CR,    CLK_PLL1_DIV4,  2, 1),
        DEF_FIXED("cp",         R8A7795_CLK_CP,    CLK_EXTAL,      2, 1),
+       DEF_FIXED("cpex",       R8A7795_CLK_CPEX,  CLK_EXTAL,      2, 1),
 
        DEF_DIV6P1("canfd",     R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
        DEF_DIV6P1("csi0",      R8A7795_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),