ARM: dts: sun6i: Fix RTC node

The RTC node doesn't match what is described in the binding for historical
reasons. Let's add the proper description.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a57cbf33c12f24b8d3ed2fe0f7bb20fa83ba6a18..9361ef70dbabadfe736832fa43c42baf6bd9a340 100644 (file)
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -223,7 +223,7 @@ osc32k: clk-32k {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <32768>;
-                       clock-output-names = "osc32k";
+                       clock-output-names = "ext_osc32k";
                };
 
                /*
@@ -588,7 +588,7 @@ ohci2: usb@1c1c400 {
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun6i-a31-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&osc32k>;
+                       clocks = <&osc24M>, <&rtc 0>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -601,7 +601,7 @@ pio: pinctrl@1c20800 {
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
@@ -1287,10 +1287,13 @@ drc0_out_tcon1: endpoint@1 {
                };
 
                rtc: rtc@1f00000 {
+                       #clock-cells = <1>;
                        compatible = "allwinner,sun6i-a31-rtc";
                        reg = <0x01f00000 0x54>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc32k>;
+                       clock-output-names = "osc32k";
                };
 
                nmi_intc: interrupt-controller@1f00c00 {
@@ -1308,7 +1311,7 @@ prcm@1f01400 {
                        ar100: ar100_clk {
                                compatible = "allwinner,sun6i-a31-ar100-clk";
                                #clock-cells = <0>;
-                               clocks = <&osc32k>, <&osc24M>,
+                               clocks = <&rtc 0>, <&osc24M>,
                                         <&ccu CLK_PLL_PERIPH>,
                                         <&ccu CLK_PLL_PERIPH>;
                                clock-output-names = "ar100";
@@ -1343,7 +1346,7 @@ apb0_gates: apb0_gates_clk {
                        ir_clk: ir_clk {
                                #clock-cells = <0>;
                                compatible = "allwinner,sun4i-a10-mod0-clk";
-                               clocks = <&osc32k>, <&osc24M>;
+                               clocks = <&rtc 0>, <&osc24M>;
                                clock-output-names = "ir";
                        };
 
@@ -1373,7 +1376,7 @@ r_pio: pinctrl@1f02c00 {
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;