drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701

Config the different CMDQ reg address in driver data.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index a696509aac90c560e36bf2a54011e2fd17861af8..f165ec52b66aa6e13b30e8805e760eef786e7fbd 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -125,7 +125,6 @@
 #define VM_CMD_EN                      BIT(0)
 #define TS_VFP_EN                      BIT(5)
 
-#define DSI_CMDQ0              0x180
 #define CONFIG                         (0xff << 0)
 #define SHORT_PACKET                   0
 #define LONG_PACKET                    2
@@ -150,6 +149,10 @@
 
 struct phy;
 
+struct mtk_dsi_driver_data {
+       const u32 reg_cmdq_off;
+};
+
 struct mtk_dsi {
        struct mtk_ddp_comp ddp_comp;
        struct device *dev;
@@ -176,6 +179,7 @@ struct mtk_dsi {
        bool enabled;
        u32 irq_data;
        wait_queue_head_t irq_wait_queue;
+       const struct mtk_dsi_driver_data *driver_data;
 };
 
 static inline struct mtk_dsi *encoder_to_dsi(struct drm_encoder *e)
@@ -938,6 +942,7 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
        const char *tx_buf = msg->tx_buf;
        u8 config, cmdq_size, cmdq_off, type = msg->type;
        u32 reg_val, cmdq_mask, i;
+       u32 reg_cmdq_off = dsi->driver_data->reg_cmdq_off;
 
        if (MTK_DSI_HOST_IS_READ(type))
                config = BTA;
@@ -957,9 +962,9 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
        }
 
        for (i = 0; i < msg->tx_len; i++)
-               writeb(tx_buf[i], dsi->regs + DSI_CMDQ0 + cmdq_off + i);
+               writeb(tx_buf[i], dsi->regs + reg_cmdq_off + cmdq_off + i);
 
-       mtk_dsi_mask(dsi, DSI_CMDQ0, cmdq_mask, reg_val);
+       mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val);
        mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size);
 }
 
@@ -1103,6 +1108,8 @@ static int mtk_dsi_probe(struct platform_device *pdev)
        if (ret)
                goto err_unregister_host;
 
+       dsi->driver_data = of_device_get_match_data(dev);
+
        dsi->engine_clk = devm_clk_get(dev, "engine");
        if (IS_ERR(dsi->engine_clk)) {
                ret = PTR_ERR(dsi->engine_clk);
@@ -1196,9 +1203,19 @@ static int mtk_dsi_remove(struct platform_device *pdev)
        return 0;
 }
 
+static const struct mtk_dsi_driver_data mt8173_dsi_driver_data = {
+       .reg_cmdq_off = 0x200,
+};
+
+static const struct mtk_dsi_driver_data mt2701_dsi_driver_data = {
+       .reg_cmdq_off = 0x180,
+};
+
 static const struct of_device_id mtk_dsi_of_match[] = {
-       { .compatible = "mediatek,mt2701-dsi" },
-       { .compatible = "mediatek,mt8173-dsi" },
+       { .compatible = "mediatek,mt2701-dsi",
+         .data = &mt2701_dsi_driver_data },
+       { .compatible = "mediatek,mt8173-dsi",
+         .data = &mt8173_dsi_driver_data },
        { },
 };