]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: imx6ul: add GPIO clocks
authorAnson Huang <Anson.Huang@nxp.com>
Sun, 3 Jun 2018 01:44:05 +0000 (09:44 +0800)
committerShawn Guo <shawnguo@kernel.org>
Thu, 12 Jul 2018 00:57:33 +0000 (08:57 +0800)
i.MX6UL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul.dtsi

index 47a3453a4211fe2bebe5bb72c0d42ae370c66b43..e27bd919e28b677b709bdf3244ab4689f4dd35f9 100644 (file)
@@ -433,6 +433,7 @@ gpio1: gpio@209c000 {
                                reg = <0x0209c000 0x4000>;
                                interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_GPIO1>;
                                gpio-controller;
                                #gpio-cells = <2>;
                                interrupt-controller;
@@ -446,6 +447,7 @@ gpio2: gpio@20a0000 {
                                reg = <0x020a0000 0x4000>;
                                interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_GPIO2>;
                                gpio-controller;
                                #gpio-cells = <2>;
                                interrupt-controller;
@@ -458,6 +460,7 @@ gpio3: gpio@20a4000 {
                                reg = <0x020a4000 0x4000>;
                                interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_GPIO3>;
                                gpio-controller;
                                #gpio-cells = <2>;
                                interrupt-controller;
@@ -470,6 +473,7 @@ gpio4: gpio@20a8000 {
                                reg = <0x020a8000 0x4000>;
                                interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_GPIO4>;
                                gpio-controller;
                                #gpio-cells = <2>;
                                interrupt-controller;
@@ -482,6 +486,7 @@ gpio5: gpio@20ac000 {
                                reg = <0x020ac000 0x4000>;
                                interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_GPIO5>;
                                gpio-controller;
                                #gpio-cells = <2>;
                                interrupt-controller;