]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
Merge tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux...
authorArnd Bergmann <arnd@arndb.de>
Fri, 31 Mar 2017 09:52:16 +0000 (11:52 +0200)
committerArnd Bergmann <arnd@arndb.de>
Fri, 31 Mar 2017 09:52:16 +0000 (11:52 +0200)
Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli:

This pull request contains Broadcom ARM64-based SoCs Device Tree updates for
4.12, please pull the following:

- Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper
  Device Tree nodes

- Jon replaces all occurences of: status = "ok" with status = "okay" to better
  conform to the Device Tree specification

* tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux:
  arm64: dts: NS2: convert "ok" to "okay"
  arm64: dts: NS2: Add Broadcom SPU driver DT entry

arch/arm64/boot/dts/broadcom/ns2-svk.dts
arch/arm64/boot/dts/broadcom/ns2-xmc.dts
arch/arm64/boot/dts/broadcom/ns2.dtsi

index 5ae08161649ed4fcd3ef6ca3656aff92a51db928..ec19fbf928a142db6d9e853fee7e98f1e31d66b2 100644 (file)
@@ -57,55 +57,55 @@ memory {
 };
 
 &enet {
-       status = "ok";
+       status = "okay";
 };
 
 &pci_phy0 {
-       status = "ok";
+       status = "okay";
 };
 
 &pci_phy1 {
-       status = "ok";
+       status = "okay";
 };
 
 &pcie0 {
-       status = "ok";
+       status = "okay";
 };
 
 &pcie4 {
-       status = "ok";
+       status = "okay";
 };
 
 &pcie8 {
-       status = "ok";
+       status = "okay";
 };
 
 &i2c0 {
-       status = "ok";
+       status = "okay";
 };
 
 &i2c1 {
-       status = "ok";
+       status = "okay";
 };
 
 &uart0 {
-       status = "ok";
+       status = "okay";
 };
 
 &uart1 {
-       status = "ok";
+       status = "okay";
 };
 
 &uart2 {
-       status = "ok";
+       status = "okay";
 };
 
 &uart3 {
-       status = "ok";
+       status = "okay";
 };
 
 &ssp0 {
-       status = "ok";
+       status = "okay";
 
        slic@0 {
                compatible = "silabs,si3226x";
@@ -126,7 +126,7 @@ slic@0 {
 };
 
 &ssp1 {
-       status = "ok";
+       status = "okay";
 
        at25@0 {
                compatible = "atmel,at25";
@@ -150,23 +150,23 @@ at25@0 {
 };
 
 &sata_phy0 {
-       status = "ok";
+       status = "okay";
 };
 
 &sata_phy1 {
-       status = "ok";
+       status = "okay";
 };
 
 &sata {
-       status = "ok";
+       status = "okay";
 };
 
 &sdio0 {
-       status = "ok";
+       status = "okay";
 };
 
 &sdio1 {
-       status = "ok";
+       status = "okay";
 };
 
 &nand {
index 99a2723cccd28b3b4f46ed62a588af97f5a085c3..ab4ae1a32fabd48527694b384f6622ccd125107d 100644 (file)
@@ -54,15 +54,15 @@ memory {
 };
 
 &enet {
-       status = "ok";
+       status = "okay";
 };
 
 &i2c0 {
-       status = "ok";
+       status = "okay";
 };
 
 &i2c1 {
-       status = "ok";
+       status = "okay";
 };
 
 &mdio_mux_iproc {
@@ -122,27 +122,27 @@ partition@0a400000{
 };
 
 &pci_phy0 {
-       status = "ok";
+       status = "okay";
 };
 
 &pcie0 {
-       status = "ok";
+       status = "okay";
 };
 
 &pcie8 {
-       status = "ok";
+       status = "okay";
 };
 
 &sata_phy0 {
-       status = "ok";
+       status = "okay";
 };
 
 &sata_phy1 {
-       status = "ok";
+       status = "okay";
 };
 
 &sata {
-       status = "ok";
+       status = "okay";
 };
 
 &qspi {
@@ -187,5 +187,5 @@ partition@1000000 {
 };
 
 &uart3 {
-       status = "ok";
+       status = "okay";
 };
index 9f9e203c09c5ad362ae00d5038d2e52c91043f39..b8503fc1bb54a77604c5395455e6a97f3ec8b568 100644 (file)
@@ -217,6 +217,12 @@ pdc0: iproc-pdc0@612c0000 {
                        brcm,use-bcm-hdr;
                };
 
+               crypto0: crypto@612d0000 {
+                       compatible = "brcm,spum-crypto";
+                       reg = <0x612d0000 0x900>;
+                       mboxes = <&pdc0 0>;
+               };
+
                pdc1: iproc-pdc1@612e0000 {
                        compatible = "brcm,iproc-pdc-mbox";
                        reg = <0x612e0000 0x445>;  /* PDC FS1 regs */
@@ -226,6 +232,12 @@ pdc1: iproc-pdc1@612e0000 {
                        brcm,use-bcm-hdr;
                };
 
+               crypto1: crypto@612f0000 {
+                       compatible = "brcm,spum-crypto";
+                       reg = <0x612f0000 0x900>;
+                       mboxes = <&pdc1 0>;
+               };
+
                pdc2: iproc-pdc2@61300000 {
                        compatible = "brcm,iproc-pdc-mbox";
                        reg = <0x61300000 0x445>;  /* PDC FS2 regs */
@@ -235,6 +247,12 @@ pdc2: iproc-pdc2@61300000 {
                        brcm,use-bcm-hdr;
                };
 
+               crypto2: crypto@61310000 {
+                       compatible = "brcm,spum-crypto";
+                       reg = <0x61310000 0x900>;
+                       mboxes = <&pdc2 0>;
+               };
+
                pdc3: iproc-pdc3@61320000 {
                        compatible = "brcm,iproc-pdc-mbox";
                        reg = <0x61320000 0x445>;  /* PDC FS3 regs */
@@ -244,6 +262,12 @@ pdc3: iproc-pdc3@61320000 {
                        brcm,use-bcm-hdr;
                };
 
+               crypto3: crypto@61330000 {
+                       compatible = "brcm,spum-crypto";
+                       reg = <0x61330000 0x900>;
+                       mboxes = <&pdc3 0>;
+               };
+
                dma0: dma@61360000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x61360000 0x1000>;