]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Thu, 20 Oct 2016 04:44:06 +0000 (13:44 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sat, 5 Nov 2016 04:25:32 +0000 (13:25 +0900)
Add a CPU clock to every CPU node and a CPU OPP table to use the
generic cpufreq driver.

Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

index 73e0acfd4f98db30c33c3aff29cb87047d9b0169..0e5c58f7624da31716d47334100b25ed6d28f52e 100644 (file)
@@ -70,14 +70,52 @@ cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x000>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x001>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
+               };
+       };
+
+       cluster0_opp: opp_table {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@245000000 {
+                       opp-hz = /bits/ 64 <245000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@250000000 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@490000000 {
+                       opp-hz = /bits/ 64 <490000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@653334000 {
+                       opp-hz = /bits/ 64 <653334000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@666667000 {
+                       opp-hz = /bits/ 64 <666667000>;
+                       clock-latency-ns = <300>;
+               };
+               opp@980000000 {
+                       opp-hz = /bits/ 64 <980000000>;
+                       clock-latency-ns = <300>;
                };
        };