]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
authorHiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Wed, 10 Dec 2014 01:21:12 +0000 (10:21 +0900)
committerSimon Horman <horms+renesas@verge.net.au>
Sun, 21 Dec 2014 10:07:19 +0000 (19:07 +0900)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm/boot/dts/r8a7794.dtsi
include/dt-bindings/clock/r8a7794-clock.h

index 13e4a8d7302933ba7c6131cc57f36468b3b092ec..6d95638987e77566c7a4a542780b94bd20f86909 100644 (file)
@@ -479,16 +479,19 @@ mstp2_clks: mstp2_clks@e6150138 {
                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
                        clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
-                                <&mp_clk>, <&mp_clk>, <&mp_clk>;
+                                <&mp_clk>, <&mp_clk>, <&mp_clk>,
+                                <&zs_clk>, <&zs_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
                                R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
                                R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
+                               R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
                        >;
                        clock-output-names =
                                "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
-                               "scifb1", "msiof1", "scifb2";
+                               "scifb1", "msiof1", "scifb2",
+                               "sys-dmac1", "sys-dmac0";
                };
                mstp3_clks: mstp3_clks@e615013c {
                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
index 52492d85fea16888b28eb03922704737ccddb593..c0bd14a5c6f3c711c17290b8733d9647556163bb 100644 (file)
@@ -48,6 +48,8 @@
 #define R8A7794_CLK_SCIFB1             7
 #define R8A7794_CLK_MSIOF1             8
 #define R8A7794_CLK_SCIFB2             16
+#define R8A7794_CLK_SYS_DMAC1          18
+#define R8A7794_CLK_SYS_DMAC0          19
 
 /* MSTP3 */
 #define R8A7794_CLK_CMT1               29