]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: sunxi: Add the missing clocks to the pinctrl nodes
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 19 Oct 2016 09:15:27 +0000 (11:15 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 22 Nov 2016 14:34:08 +0000 (15:34 +0100)
The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
arch/arm/boot/dts/sun4i-a10.dtsi
arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/sun8i-a23-a33.dtsi
arch/arm/boot/dts/sun8i-h3.dtsi
arch/arm/boot/dts/sun9i-a80.dtsi

index 7e7dfc2b43db0e722c5d3a6777fb5278b71ec0d3..b14a4281058d86f715f717e44f1d7b35e0ed931a 100644 (file)
@@ -967,7 +967,8 @@ pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun4i-a10-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <28>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index b4ccee8cfb02a744931b235a05406d26c873a99d..b0fca4ef4dae88550c5a45af41b977e86a8e1247 100644 (file)
@@ -547,7 +547,8 @@ intc: interrupt-controller@01c20400 {
                pio: pinctrl@01c20800 {
                        reg = <0x01c20800 0x400>;
                        interrupts = <28>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index ef24669234a05d5216195cba836399dc9a62e759..2b26175d55d1b7e3cc27611eb5883f4bc913d575 100644 (file)
@@ -471,7 +471,8 @@ pio: pinctrl@01c20800 {
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1_PIO>;
+                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
@@ -1064,7 +1065,8 @@ r_pio: pinctrl@01f02c00 {
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;
                        interrupt-controller;
index 94cf5a1c7172371b3c5691e831a238dd563d83c7..f7db067b0de0fb03206890323cd0d6223eb2b771 100644 (file)
@@ -1085,7 +1085,8 @@ pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun7i-a20-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index 300a1bd5a6ecfd42a8968c7b76d2296fbccc1a2f..e4991a78ad73526383664c7f732a2d5d8f16482d 100644 (file)
@@ -266,7 +266,8 @@ pio: pinctrl@01c20800 {
                        /* compatible gets set in SoC specific dtsi file */
                        reg = <0x01c20800 0x400>;
                        /* interrupts get set in SoC specific dtsi file */
-                       clocks = <&ccu CLK_BUS_PIO>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
@@ -575,7 +576,8 @@ r_pio: pinctrl@01f02c00 {
                        compatible = "allwinner,sun8i-a23-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;
                        interrupt-controller;
index c38b028cac839f981c55e557b411eb71f3049d19..3c6596f06ebc3840b0c5c17e212ed69658f59061 100644 (file)
@@ -321,7 +321,8 @@ pio: pinctrl@01c20800 {
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
@@ -614,7 +615,8 @@ r_pio: pinctrl@01f02c00 {
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_reset 0>;
                        gpio-controller;
                        #gpio-cells = <3>;
index ab6a221027ef5e34985e296b18321aad367d9cef..979ad1aacfb1fc9c830710a29eca32ce29ce3405 100644 (file)
@@ -678,7 +678,8 @@ pio: pinctrl@06000800 {
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
@@ -902,7 +903,8 @@ r_pio: pinctrl@08002c00 {
                        reg = <0x08002c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apbs_gates 0>;
+                       clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apbs_rst 0>;
                        gpio-controller;
                        interrupt-controller;