]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915: Show support for accurate sw PMU busyness tracking
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 3 Jul 2019 14:37:02 +0000 (15:37 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 4 Jul 2019 14:42:24 +0000 (15:42 +0100)
Expose whether or not we support the PMU software tracking in our
scheduler capabilities, so userspace can query at runtime.

v2: Use I915_SCHEDULER_CAP_ENGINE_BUSY_STATS for a less ambiguous
capability name.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190703143702.11339-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_engine_cs.c
drivers/gpu/drm/i915/i915_pmu.c
include/uapi/drm/i915_drm.h

index c1fb5fa3952e44b6df907332115dcb9e4ba717ab..7d6d6e62e9cc6f889a51aeea64aa8132f739e7a0 100644 (file)
@@ -688,9 +688,10 @@ void intel_engines_set_scheduler_caps(struct drm_i915_private *i915)
                u8 engine;
                u8 sched;
        } map[] = {
-#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) }
-               MAP(PREEMPTION, PREEMPTION),
-               MAP(SEMAPHORES, SEMAPHORES),
+#define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) }
+               MAP(HAS_PREEMPTION, PREEMPTION),
+               MAP(HAS_SEMAPHORES, SEMAPHORES),
+               MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
 #undef MAP
        };
        struct intel_engine_cs *engine;
index 8fe46ee920a0e73c43ede44479ca40ccd3ac4583..eff86483bec0d11bb14720c40327cfe679bd2c09 100644 (file)
@@ -102,10 +102,8 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
        /*
         * Also there is software busyness tracking available we do not
         * need the timer for I915_SAMPLE_BUSY counter.
-        *
-        * Use RCS as proxy for all engines.
         */
-       else if (intel_engine_supports_stats(i915->engine[RCS0]))
+       else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS)
                enable &= ~BIT(I915_SAMPLE_BUSY);
 
        /*
index 328d05e77d9f6c6b3783dc67ba7316545bb9c0c3..469dc512cca3513f0a38400c5ed1598096147de9 100644 (file)
@@ -521,6 +521,7 @@ typedef struct drm_i915_irq_wait {
 #define   I915_SCHEDULER_CAP_PRIORITY  (1ul << 1)
 #define   I915_SCHEDULER_CAP_PREEMPTION        (1ul << 2)
 #define   I915_SCHEDULER_CAP_SEMAPHORES        (1ul << 3)
+#define   I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
 
 #define I915_PARAM_HUC_STATUS           42