]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915: s/num_active_crtcs/num_active_pipes/
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 21 Aug 2019 17:30:32 +0000 (20:30 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 23 Aug 2019 18:36:01 +0000 (21:36 +0300)
Set a good example and talk about pipes rather than crtcs.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190821173033.24123-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_pm.c

index 437cd50e5d06770e8bedbfa355f4736da53745d6..b4b9609db092109c55e40db778f281c11a89f22b 100644 (file)
@@ -1490,7 +1490,7 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
                         struct g4x_wm_values *wm)
 {
        struct intel_crtc *crtc;
-       int num_active_crtcs = 0;
+       int num_active_pipes = 0;
 
        wm->cxsr = true;
        wm->hpll_en = true;
@@ -1509,10 +1509,10 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
                if (!wm_state->fbc_en)
                        wm->fbc_en = false;
 
-               num_active_crtcs++;
+               num_active_pipes++;
        }
 
-       if (num_active_crtcs != 1) {
+       if (num_active_pipes != 1) {
                wm->cxsr = false;
                wm->hpll_en = false;
                wm->fbc_en = false;
@@ -2098,7 +2098,7 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
                         struct vlv_wm_values *wm)
 {
        struct intel_crtc *crtc;
-       int num_active_crtcs = 0;
+       int num_active_pipes = 0;
 
        wm->level = dev_priv->wm.max_level;
        wm->cxsr = true;
@@ -2112,14 +2112,14 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
                if (!wm_state->cxsr)
                        wm->cxsr = false;
 
-               num_active_crtcs++;
+               num_active_pipes++;
                wm->level = min_t(int, wm->level, wm_state->num_levels - 1);
        }
 
-       if (num_active_crtcs != 1)
+       if (num_active_pipes != 1)
                wm->cxsr = false;
 
-       if (num_active_crtcs > 1)
+       if (num_active_pipes > 1)
                wm->level = VLV_WM_LEVEL_PM2;
 
        for_each_intel_crtc(&dev_priv->drm, crtc) {