]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
amdgpu/dc: another round of dce/dcn construct cleanups.
authorDave Airlie <airlied@redhat.com>
Fri, 29 Sep 2017 04:34:39 +0000 (14:34 +1000)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 29 Sep 2017 17:02:34 +0000 (13:02 -0400)
This removes any remaining pointless return codepaths from the
DCE code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
32 files changed:
drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.h
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_v.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_v.h
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.h
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.h
drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.h
drivers/gpu/drm/amd/display/dc/dce80/dce80_compressor.c
drivers/gpu/drm/amd/display/dc/dce80/dce80_compressor.h
drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c

index 492ea6069eb4c0833d85908c00469834fd27789b..e7a694835e3e27bcb0dd64cdda00e7a6e5535652 100644 (file)
@@ -142,13 +142,11 @@ void dce100_set_bandwidth(
 
 /**************************************************************************/
 
-bool dce100_hw_sequencer_construct(struct dc *dc)
+void dce100_hw_sequencer_construct(struct dc *dc)
 {
        dce110_hw_sequencer_construct(dc);
 
        dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating;
        dc->hwss.set_bandwidth = dce100_set_bandwidth;
-
-       return true;
 }
 
index 770b5bb1ff40ac0cf4ba379306b82106cf3d5bb5..cb5384ef46c307822e93428a40885cdbcae79807 100644 (file)
@@ -31,7 +31,7 @@
 struct dc;
 struct dc_state;
 
-bool dce100_hw_sequencer_construct(struct dc *dc);
+void dce100_hw_sequencer_construct(struct dc *dc);
 
 void dce100_set_bandwidth(
                struct dc *dc,
index 1caf2983dda5c82774787cfef2448ee6f93c9c4b..0db987d504c0f3b4fb5d251dee8f3fc78b78e40c 100644 (file)
@@ -909,9 +909,7 @@ static bool construct(
                goto res_create_fail;
 
        /* Create hardware sequencer */
-       if (!dce100_hw_sequencer_construct(dc))
-               goto res_create_fail;
-
+       dce100_hw_sequencer_construct(dc);
        return true;
 
 res_create_fail:
index 90770cb2ffcd4ff16afdca48c3d5377cda773cd4..3872febb4f6b45ea750e6d876ed44cce1e90a0f6 100644 (file)
@@ -393,12 +393,8 @@ struct compressor *dce110_compressor_create(struct dc_context *ctx)
        if (!cp110)
                return NULL;
 
-       if (dce110_compressor_construct(cp110, ctx))
-               return &cp110->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(cp110);
-       return NULL;
+       dce110_compressor_construct(cp110, ctx);
+       return &cp110->base;
 }
 
 void dce110_compressor_destroy(struct compressor **compressor)
@@ -485,7 +481,7 @@ static const struct compressor_funcs dce110_compressor_funcs = {
 };
 
 
-bool dce110_compressor_construct(struct dce110_compressor *compressor,
+void dce110_compressor_construct(struct dce110_compressor *compressor,
        struct dc_context *ctx)
 {
 
@@ -522,6 +518,5 @@ bool dce110_compressor_construct(struct dce110_compressor *compressor,
        compressor->base.funcs = &dce110_compressor_funcs;
 
 #endif
-       return true;
 }
 
index 460cb77b8d75cee21023ee9196c31eb588570f30..26c7335a1cbf936a122b5ab9b4b7baeededfd937 100644 (file)
@@ -42,7 +42,7 @@ struct dce110_compressor {
 
 struct compressor *dce110_compressor_create(struct dc_context *ctx);
 
-bool dce110_compressor_construct(struct dce110_compressor *cp110,
+void dce110_compressor_construct(struct dce110_compressor *cp110,
        struct dc_context *ctx);
 
 void dce110_compressor_destroy(struct compressor **cp);
index 5bbfc34d6f01d502b5f32bb8844afe54dfbd629a..de154329b04931dfdc0b7e9b33ee44248e504717 100644 (file)
@@ -2723,10 +2723,8 @@ static const struct hw_sequencer_funcs dce110_funcs = {
 
 };
 
-bool dce110_hw_sequencer_construct(struct dc *dc)
+void dce110_hw_sequencer_construct(struct dc *dc)
 {
        dc->hwss = dce110_funcs;
-
-       return true;
 }
 
index baa20c1f17ad9aacb06d2e54a8b44cd469518ab8..db6c19cd15eb18b4e86b6a5147360a4998b72b40 100644 (file)
@@ -33,7 +33,7 @@ struct dc;
 struct dc_state;
 struct dm_pp_display_configuration;
 
-bool dce110_hw_sequencer_construct(struct dc *dc);
+void dce110_hw_sequencer_construct(struct dc *dc);
 
 enum dc_status dce110_apply_ctx_to_hw(
                struct dc *dc,
index 69d6a110dbc38914c1f8e70250af13ea765885fb..3545e43a4b779c798541b4d50b9a12b2a64b2058 100644 (file)
@@ -44,13 +44,11 @@ static const struct opp_funcs funcs = {
                                dce110_opp_program_bit_depth_reduction
 };
 
-bool dce110_opp_v_construct(struct dce110_opp *opp110,
+void dce110_opp_v_construct(struct dce110_opp *opp110,
        struct dc_context *ctx)
 {
        opp110->base.funcs = &funcs;
 
        opp110->base.ctx = ctx;
-
-       return true;
 }
 
index 269c1a88d5bb15fb15e20f9dbb5539dfe5ec3cb0..152af4c418cbd210fa3b26be5d3e8988ee46092c 100644 (file)
@@ -29,7 +29,7 @@
 #include "opp.h"
 #include "core_types.h"
 
-bool dce110_opp_v_construct(struct dce110_opp *opp110,
+void dce110_opp_v_construct(struct dce110_opp *opp110,
        struct dc_context *ctx);
 
 /* underlay callbacks */
index 45c5facf79b1a16d1cb41e31dcb9c7a429451b4d..017a1fd1f659f7c6a2d36f2f68b456e011c9cb05 100644 (file)
@@ -1041,8 +1041,7 @@ static bool underlay_create(struct dc_context *ctx, struct resource_pool *pool)
                (dce110_oppv == NULL))
                        return false;
 
-       if (!dce110_opp_v_construct(dce110_oppv, ctx))
-               return false;
+       dce110_opp_v_construct(dce110_oppv, ctx);
 
        dce110_timing_generator_v_construct(dce110_tgv, ctx);
        dce110_mem_input_v_construct(dce110_miv, ctx);
@@ -1292,8 +1291,7 @@ static bool construct(
                goto res_create_fail;
 
        /* Create hardware sequencer */
-       if (!dce110_hw_sequencer_construct(dc))
-               goto res_create_fail;
+       dce110_hw_sequencer_construct(dc);
 
        dc->caps.max_planes =  pool->base.pipe_count;
 
index 93ca6ae48cb9b4add9f3396f8a65703e0d1b2637..07d9303d54772581a42fc1888b3267c0f44e728d 100644 (file)
@@ -668,13 +668,10 @@ static const struct timing_generator_funcs dce110_tg_v_funcs = {
                                dce110_timing_generator_v_enable_advanced_request
 };
 
-bool dce110_timing_generator_v_construct(
+void dce110_timing_generator_v_construct(
        struct dce110_timing_generator *tg110,
        struct dc_context *ctx)
 {
-       if (!tg110)
-               return false;
-
        tg110->controller_id = CONTROLLER_ID_UNDERLAY0;
 
        tg110->base.funcs = &dce110_tg_v_funcs;
@@ -688,6 +685,4 @@ bool dce110_timing_generator_v_construct(
        tg110->min_h_blank = 56;
        tg110->min_h_front_porch = 4;
        tg110->min_h_back_porch = 4;
-
-       return true;
 }
index 7e49ca8e26ad595bbda114098ebbd663a0c82d4d..d2623a5994e881953e77ec365ddb3991bc0f1b50 100644 (file)
@@ -26,7 +26,7 @@
 #ifndef __DC_TIMING_GENERATOR_V_DCE110_H__
 #define __DC_TIMING_GENERATOR_V_DCE110_H__
 
-bool dce110_timing_generator_v_construct(
+void dce110_timing_generator_v_construct(
        struct dce110_timing_generator *tg110,
        struct dc_context *ctx);
 
index e75895baa13233b129caf163c5e104442b20188b..69649928768cfae5c33ea5ee325af8fbe4c2917b 100644 (file)
@@ -791,7 +791,7 @@ void dce112_compressor_set_fbc_invalidation_triggers(
        dm_write_reg(compressor->ctx, addr, value);
 }
 
-bool dce112_compressor_construct(struct dce112_compressor *compressor,
+void dce112_compressor_construct(struct dce112_compressor *compressor,
        struct dc_context *ctx)
 {
        struct dc_bios *bp = ctx->dc_bios;
@@ -833,7 +833,6 @@ bool dce112_compressor_construct(struct dce112_compressor *compressor,
                compressor->base.embedded_panel_v_size =
                        panel_info.lcd_timing.vertical_addressable;
        }
-       return true;
 }
 
 struct compressor *dce112_compressor_create(struct dc_context *ctx)
@@ -844,12 +843,8 @@ struct compressor *dce112_compressor_create(struct dc_context *ctx)
        if (!cp110)
                return NULL;
 
-       if (dce112_compressor_construct(cp110, ctx))
-               return &cp110->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(cp110);
-       return NULL;
+       dce112_compressor_construct(cp110, ctx);
+       return &cp110->base;
 }
 
 void dce112_compressor_destroy(struct compressor **compressor)
index 106506387270d8cbed77aacc2fd0e33873e84e00..f1227133f6df6e1e839e519919f4300f1b5df17a 100644 (file)
@@ -42,7 +42,7 @@ struct dce112_compressor {
 
 struct compressor *dce112_compressor_create(struct dc_context *ctx);
 
-bool dce112_compressor_construct(struct dce112_compressor *cp110,
+void dce112_compressor_construct(struct dce112_compressor *cp110,
        struct dc_context *ctx);
 
 void dce112_compressor_destroy(struct compressor **cp);
index 8816e09110e10c97fd7cec3c98429a033e34879f..1e4a7c13f0edc114f11e4506c98f6225b49ebbcb 100644 (file)
@@ -152,14 +152,12 @@ static bool dce112_enable_display_power_gating(
                return false;
 }
 
-bool dce112_hw_sequencer_construct(struct dc *dc)
+void dce112_hw_sequencer_construct(struct dc *dc)
 {
        /* All registers used by dce11.2 match those in dce11 in offset and
         * structure
         */
        dce110_hw_sequencer_construct(dc);
        dc->hwss.enable_display_power_gating = dce112_enable_display_power_gating;
-
-       return true;
 }
 
index 37bd60cc93f9040d763c30182adba1cda149dbc1..e646f4a37fa2e4705e1a07f3da895811d25ba87d 100644 (file)
@@ -30,7 +30,7 @@
 
 struct dc;
 
-bool dce112_hw_sequencer_construct(struct dc *dc);
+void dce112_hw_sequencer_construct(struct dc *dc);
 
 #endif /* __DC_HWSS_DCE112_H__ */
 
index 251e4a29d56ff89ec6f5fb5bd1f1784d0ec96245..11902a2fdaa4fb14562a2735227161da4d7e48b1 100644 (file)
@@ -1256,8 +1256,7 @@ static bool construct(
        dc->caps.max_planes =  pool->base.pipe_count;
 
        /* Create hardware sequencer */
-       if (!dce112_hw_sequencer_construct(dc))
-               goto res_create_fail;
+       dce112_hw_sequencer_construct(dc);
 
        bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id);
 
index 56e3b124f19cec2faab41f13ca9590bdba4b7c1a..1a0b54d6034efbda7a592d2bbaa2f16bc6c30388 100644 (file)
@@ -245,7 +245,7 @@ static void dce120_update_dchub(
 
 
 
-bool dce120_hw_sequencer_construct(struct dc *dc)
+void dce120_hw_sequencer_construct(struct dc *dc)
 {
        /* All registers used by dce11.2 match those in dce11 in offset and
         * structure
@@ -253,7 +253,5 @@ bool dce120_hw_sequencer_construct(struct dc *dc)
        dce110_hw_sequencer_construct(dc);
        dc->hwss.enable_display_power_gating = dce120_enable_display_power_gating;
        dc->hwss.update_dchub = dce120_update_dchub;
-
-       return true;
 }
 
index 6448a17c2fde0f834a35278fc05521bce197ce27..77a6b86d7606df0f5a650734f8c424d6853c708c 100644 (file)
@@ -30,7 +30,7 @@
 
 struct dc;
 
-bool dce120_hw_sequencer_construct(struct dc *dc);
+void dce120_hw_sequencer_construct(struct dc *dc);
 
 #endif /* __DC_HWSS_DCE112_H__ */
 
index 13d75df713960c25a2ee5289643fdc7bc4bac391..3ed28a870e207b4fa53e77f50dc5fabf0a02579c 100644 (file)
@@ -429,12 +429,8 @@ static struct timing_generator *dce120_timing_generator_create(
        if (!tg110)
                return NULL;
 
-       if (dce120_timing_generator_construct(tg110, ctx, instance, offsets))
-               return &tg110->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(tg110);
-       return NULL;
+       dce120_timing_generator_construct(tg110, ctx, instance, offsets);
+       return &tg110->base;
 }
 
 static void dce120_transform_destroy(struct transform **xfm)
index 791c9b084941e8c56b2ed49767aec2d24719515c..95d871be3a0bd2e2458c962ffbb74d8f3f614d22 100644 (file)
@@ -1143,15 +1143,12 @@ static const struct timing_generator_funcs dce120_tg_funcs = {
 };
 
 
-bool dce120_timing_generator_construct(
+void dce120_timing_generator_construct(
        struct dce110_timing_generator *tg110,
        struct dc_context *ctx,
        uint32_t instance,
        const struct dce110_timing_generator_offsets *offsets)
 {
-       if (!tg110)
-                       return false;
-
        tg110->controller_id = CONTROLLER_ID_D0 + instance;
        tg110->base.inst = instance;
 
@@ -1175,6 +1172,4 @@ bool dce120_timing_generator_construct(
        tg110->min_h_sync_width = 8;
        tg110->min_v_sync_width = 1;
        tg110->min_v_blank = 3;
-
-       return true;
 }
index 243c0a3493da7d1dd9dfac34db80a703e226374e..d69871ec0dde49bce08e4b53d20ffd1da338733e 100644 (file)
@@ -32,7 +32,7 @@
 #include "dce110/dce110_timing_generator.h"
 
 
-bool dce120_timing_generator_construct(
+void dce120_timing_generator_construct(
        struct dce110_timing_generator *tg110,
        struct dc_context *ctx,
        uint32_t instance,
index cc1c0d39094508cbb5de9e8e0290d1d8b61381af..951f2caba9b33967ab25c3416b3bc65288c779cf 100644 (file)
@@ -771,7 +771,7 @@ void dce80_compressor_set_fbc_invalidation_triggers(
        dm_write_reg(compressor->ctx, addr, value);
 }
 
-bool dce80_compressor_construct(struct dce80_compressor *compressor,
+void dce80_compressor_construct(struct dce80_compressor *compressor,
        struct dc_context *ctx)
 {
        struct dc_bios *bp = ctx->dc_bios;
@@ -813,7 +813,6 @@ bool dce80_compressor_construct(struct dce80_compressor *compressor,
                compressor->base.embedded_panel_v_size =
                        panel_info.lcd_timing.vertical_addressable;
        }
-       return true;
 }
 
 struct compressor *dce80_compressor_create(struct dc_context *ctx)
@@ -824,12 +823,8 @@ struct compressor *dce80_compressor_create(struct dc_context *ctx)
        if (!cp80)
                return NULL;
 
-       if (dce80_compressor_construct(cp80, ctx))
-               return &cp80->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(cp80);
-       return NULL;
+       dce80_compressor_construct(cp80, ctx);
+       return &cp80->base;
 }
 
 void dce80_compressor_destroy(struct compressor **compressor)
index 01290969ff92bcb2197fec9ba4654859c79e7b56..cca58b0444025dda0f0655bf5309f26dfd26f936 100644 (file)
@@ -42,7 +42,7 @@ struct dce80_compressor {
 
 struct compressor *dce80_compressor_create(struct dc_context *ctx);
 
-bool dce80_compressor_construct(struct dce80_compressor *cp80,
+void dce80_compressor_construct(struct dce80_compressor *cp80,
                struct dc_context *ctx);
 
 void dce80_compressor_destroy(struct compressor **cp);
index 28fe3824441fb20aa587693d1448187595e9d586..ccfcf1c0eeb36f2eb3f67e4c84bd1dd4eefdfaab 100644 (file)
@@ -106,14 +106,12 @@ static bool dce80_enable_display_power_gating(
                return false;
 }
 
-bool dce80_hw_sequencer_construct(struct dc *dc)
+void dce80_hw_sequencer_construct(struct dc *dc)
 {
        dce110_hw_sequencer_construct(dc);
 
        dc->hwss.enable_display_power_gating = dce80_enable_display_power_gating;
        dc->hwss.pipe_control_lock = dce_pipe_control_lock;
        dc->hwss.set_bandwidth = dce100_set_bandwidth;
-
-       return true;
 }
 
index 9d6dd05bd5968633c770c3412ab7eb4415c478d7..7a1b31def66f3646a4dc6aaab498d45f7b77eec4 100644 (file)
@@ -30,7 +30,7 @@
 
 struct dc;
 
-bool dce80_hw_sequencer_construct(struct dc *dc);
+void dce80_hw_sequencer_construct(struct dc *dc);
 
 #endif /* __DC_HWSS_DCE80_H__ */
 
index 5e00ca6a1292cd656ddac2c7a89503ddfe96d8ea..c6571a908786d11cfc6bdbd021fc744641acb081 100644 (file)
@@ -910,8 +910,7 @@ static bool dce80_construct(
                goto res_create_fail;
 
        /* Create hardware sequencer */
-       if (!dce80_hw_sequencer_construct(dc))
-               goto res_create_fail;
+       dce80_hw_sequencer_construct(dc);
 
        return true;
 
@@ -1075,8 +1074,7 @@ static bool dce81_construct(
                goto res_create_fail;
 
        /* Create hardware sequencer */
-       if (!dce80_hw_sequencer_construct(dc))
-               goto res_create_fail;
+       dce80_hw_sequencer_construct(dc);
 
        return true;
 
@@ -1236,8 +1234,7 @@ static bool dce83_construct(
                goto res_create_fail;
 
        /* Create hardware sequencer */
-       if (!dce80_hw_sequencer_construct(dc))
-               goto res_create_fail;
+       dce80_hw_sequencer_construct(dc);
 
        return true;
 
index 8607ab2da61098ca9ef9031ccc9d3cec9c8a7a44..9d9604f05095003ed74bbb1658b61985fa9c3f88 100644 (file)
@@ -397,7 +397,7 @@ static const struct transform_funcs dcn10_dpp_funcs = {
 /* Constructor, Destructor               */
 /*****************************************/
 
-bool dcn10_dpp_construct(
+void dcn10_dpp_construct(
        struct dcn10_dpp *xfm,
        struct dc_context *ctx,
        uint32_t inst,
@@ -421,6 +421,4 @@ bool dcn10_dpp_construct(
 
        xfm->lb_bits_per_entry = LB_BITS_PER_ENTRY;
        xfm->lb_memory_size = LB_TOTAL_NUMBER_OF_ENTRIES; /*0x1404*/
-
-       return true;
 }
index afe9d8f629d67dd0c0ef18a2fac0c6d24d9a10e1..a1f6b01a2eb41ba098fb1e20a741a44eccb696e6 100644 (file)
@@ -1356,7 +1356,7 @@ void ippn10_cnv_setup (
 
 void ippn10_full_bypass(struct transform *xfm_base);
 
-bool dcn10_dpp_construct(struct dcn10_dpp *xfm110,
+void dcn10_dpp_construct(struct dcn10_dpp *xfm110,
        struct dc_context *ctx,
        uint32_t inst,
        const struct dcn_dpp_registers *tf_regs,
index 9008cd03b13976427f877e9047a2cd5df2869004..c8088489c6a25001cc4159a4ddc4b35bb71051b4 100644 (file)
@@ -786,7 +786,7 @@ static struct mem_input_funcs dcn10_mem_input_funcs = {
 /* Constructor, Destructor               */
 /*****************************************/
 
-bool dcn10_mem_input_construct(
+void dcn10_mem_input_construct(
        struct dcn10_mem_input *mi,
        struct dc_context *ctx,
        uint32_t inst,
@@ -802,7 +802,5 @@ bool dcn10_mem_input_construct(
        mi->base.inst = inst;
        mi->base.opp_id = 0xf;
        mi->base.mpcc_id = 0xf;
-
-       return true;
 }
 
index acee05155b5bdf88016bf243142da68dc55ba4c4..aefd3e7bd7eb22ba295f7298176e11eb73fde463 100644 (file)
@@ -538,7 +538,7 @@ struct dcn10_mem_input {
        const struct dcn_mi_mask *mi_mask;
 };
 
-bool dcn10_mem_input_construct(
+void dcn10_mem_input_construct(
        struct dcn10_mem_input *mi,
        struct dc_context *ctx,
        uint32_t inst,
index c2df57b5e92175cd3aa541e384ed15fbc24a6e3d..fb3ef134ea12759d43475bdba21f0d6fe1c8214c 100644 (file)
@@ -462,13 +462,9 @@ static struct transform *dcn10_dpp_create(
        if (!dpp)
                return NULL;
 
-       if (dcn10_dpp_construct(dpp, ctx, inst,
-                       &tf_regs[inst], &tf_shift, &tf_mask))
-               return &dpp->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(dpp);
-       return NULL;
+       dcn10_dpp_construct(dpp, ctx, inst,
+                           &tf_regs[inst], &tf_shift, &tf_mask);
+       return &dpp->base;
 }
 
 static struct input_pixel_processor *dcn10_ipp_create(
@@ -771,13 +767,9 @@ static struct mem_input *dcn10_mem_input_create(
        if (!mem_inputn10)
                return NULL;
 
-       if (dcn10_mem_input_construct(mem_inputn10, ctx, inst,
-                       &mi_regs[inst], &mi_shift, &mi_mask))
-               return &mem_inputn10->base;
-
-       BREAK_TO_DEBUGGER();
-       kfree(mem_inputn10);
-       return NULL;
+       dcn10_mem_input_construct(mem_inputn10, ctx, inst,
+                                 &mi_regs[inst], &mi_shift, &mi_mask);
+       return &mem_inputn10->base;
 }
 
 static void get_pixel_clock_parameters(