]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: socfpga: update to new Denali NAND binding
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 21 Jun 2019 11:23:06 +0000 (20:23 +0900)
committerDinh Nguyen <dinguyen@kernel.org>
Tue, 30 Jul 2019 14:05:14 +0000 (09:05 -0500)
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts

index ec1966480f2f0376522bda05d1e7347821238a46..90d6d0d4417d36fa7e0c8da0fd03d1a6782d7d7d 100644 (file)
@@ -747,7 +747,7 @@ mmc: dwmmc0@ff704000 {
 
                nand0: nand@ff900000 {
                        #address-cells = <0x1>;
-                       #size-cells = <0x1>;
+                       #size-cells = <0x0>;
                        compatible = "altr,socfpga-denali-nand";
                        reg = <0xff900000 0x100000>,
                              <0xffb80000 0x10000>;
index 26c157b91189966107c888c51c4b411cb67d4a34..2a86e72d97918a36f445e6319513aa3e2364c74b 100644 (file)
@@ -662,7 +662,7 @@ mmc: dwmmc0@ff808000 {
 
                nand: nand@ffb90000 {
                        #address-cells = <1>;
-                       #size-cells = <1>;
+                       #size-cells = <0>;
                        compatible = "altr,socfpga-denali-nand";
                        reg = <0xffb90000 0x72000>,
                              <0xffb80000 0x10000>;
index e36e0a0f8aa624801812f3836fb9b4246acede5d..9bd9e04c73613b45897a586bbde476aad6e248e3 100644 (file)
@@ -9,12 +9,18 @@
 &nand {
        status = "okay";
 
-       partition@nand-boot {
-               label = "Boot and fpga data";
-               reg = <0x0 0x1C00000>;
-       };
-       partition@nand-rootfs {
-               label = "Root Filesystem - JFFS2";
-               reg = <0x1C00000 0x6400000>;
+       nand@0 {
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partition@0 {
+                       label = "Boot and fpga data";
+                       reg = <0x0 0x1C00000>;
+               };
+               partition@1c00000 {
+                       label = "Root Filesystem - JFFS2";
+                       reg = <0x1C00000 0x6400000>;
+               };
        };
 };