]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
reset: dt-bindings: meson: update arb bindings for sm1
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 5 Sep 2019 13:50:39 +0000 (15:50 +0200)
committerPhilipp Zabel <p.zabel@pengutronix.de>
Thu, 3 Oct 2019 17:56:51 +0000 (19:56 +0200)
SM1 SoC family adds two new audio FIFOs with the related arb reset lines

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h

index 26e542eb96dfa227769fe4a9695ce1744b3a2b99..43e580ef64ba13aa4c970e7935399b781df28e30 100644 (file)
@@ -4,7 +4,8 @@ The Amlogic Audio ARB is a simple device which enables or
 disables the access of Audio FIFOs to DDR on AXG based SoC.
 
 Required properties:
-- compatible: 'amlogic,meson-axg-audio-arb'
+- compatible: 'amlogic,meson-axg-audio-arb' or
+             'amlogic,meson-sm1-audio-arb'
 - reg: physical base address of the controller and length of memory
        mapped region.
 - clocks: phandle to the fifo peripheral clock provided by the audio
index 05c36367875c8bdaeec3b13b63b6e2fc852de9d3..1ef807856cb8989152e72323a3d6ee895cac0d53 100644 (file)
@@ -13,5 +13,7 @@
 #define AXG_ARB_FRDDR_A        3
 #define AXG_ARB_FRDDR_B        4
 #define AXG_ARB_FRDDR_C        5
+#define AXG_ARB_TODDR_D        6
+#define AXG_ARB_FRDDR_D        7
 
 #endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */