]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dt-bindings: fsl: scu: add ocotp binding
authorPeng Fan <peng.fan@nxp.com>
Fri, 14 Jun 2019 14:32:18 +0000 (15:32 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 19 Jun 2019 17:35:50 +0000 (19:35 +0200)
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller(SCU), the ocotp controller is being controlled
by the SCU, so Linux need use RPC to SCU for ocotp handling. This
patch adds binding doc for i.MX8 SCU OCOTP driver.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt

index 5d7dbabbb78449ae22f8a2a12174a00e6e292f12..f378922906f6a2e1c7006545973746df80c6f173 100644 (file)
@@ -133,6 +133,18 @@ RTC bindings based on SCU Message Protocol
 Required properties:
 - compatible: should be "fsl,imx8qxp-sc-rtc";
 
+OCOTP bindings based on SCU Message Protocol
+------------------------------------------------------------
+Required properties:
+- compatible:          Should be "fsl,imx8qxp-scu-ocotp"
+- #address-cells:      Must be 1. Contains byte index
+- #size-cells:         Must be 1. Contains byte length
+
+Optional Child nodes:
+
+- Data cells of ocotp:
+  Detailed bindings are described in bindings/nvmem/nvmem.txt
+
 Example (imx8qxp):
 -------------
 aliases {
@@ -177,6 +189,16 @@ firmware {
                        ...
                };
 
+               ocotp: imx8qx-ocotp {
+                       compatible = "fsl,imx8qxp-scu-ocotp";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       fec_mac0: mac@2c4 {
+                               reg = <0x2c4 8>;
+                       };
+               };
+
                pd: imx8qx-pd {
                        compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
                        #power-domain-cells = <1>;