]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
habanalabs: use EQ MSI/X ID per chip
authorOded Gabbay <oded.gabbay@gmail.com>
Mon, 4 Mar 2019 13:51:30 +0000 (15:51 +0200)
committerOded Gabbay <oded.gabbay@gmail.com>
Mon, 4 Mar 2019 13:51:30 +0000 (15:51 +0200)
The Event Queue MSI/X ID is different per ASIC. This patch renames the
current define to have the GOYA_ prefix to mark it only for Goya. It also
moves it from the common armcp_if.h file to the ASIC specific goya_fw_if.h
file.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drivers/misc/habanalabs/goya/goya.c
drivers/misc/habanalabs/include/armcp_if.h
drivers/misc/habanalabs/include/goya/goya_fw_if.h

index 30f83521de90589acdeb3ca9b252dfa3613ad9d4..78eacd14c9ac980bdd9cecd49d0137312a4bd4ae 100644 (file)
@@ -2204,10 +2204,10 @@ static int goya_enable_msix(struct hl_device *hdev)
                }
        }
 
-       irq = pci_irq_vector(hdev->pdev, EVENT_QUEUE_MSIX_IDX);
+       irq = pci_irq_vector(hdev->pdev, GOYA_EVENT_QUEUE_MSIX_IDX);
 
        rc = request_irq(irq, hl_irq_handler_eq, 0,
-                       goya_irq_name[EVENT_QUEUE_MSIX_IDX],
+                       goya_irq_name[GOYA_EVENT_QUEUE_MSIX_IDX],
                        &hdev->event_queue);
        if (rc) {
                dev_err(hdev->dev, "Failed to request IRQ %d", irq);
@@ -2238,7 +2238,7 @@ static void goya_sync_irqs(struct hl_device *hdev)
        for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++)
                synchronize_irq(pci_irq_vector(hdev->pdev, i));
 
-       synchronize_irq(pci_irq_vector(hdev->pdev, EVENT_QUEUE_MSIX_IDX));
+       synchronize_irq(pci_irq_vector(hdev->pdev, GOYA_EVENT_QUEUE_MSIX_IDX));
 }
 
 static void goya_disable_msix(struct hl_device *hdev)
@@ -2251,7 +2251,7 @@ static void goya_disable_msix(struct hl_device *hdev)
 
        goya_sync_irqs(hdev);
 
-       irq = pci_irq_vector(hdev->pdev, EVENT_QUEUE_MSIX_IDX);
+       irq = pci_irq_vector(hdev->pdev, GOYA_EVENT_QUEUE_MSIX_IDX);
        free_irq(irq, &hdev->event_queue);
 
        for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) {
index ccb82390241e57619e70968499fe759ec20ffac8..c8f28cadc3354bcb35bac9bb12824a036d50d2a3 100644 (file)
@@ -32,8 +32,6 @@ struct hl_eq_entry {
 #define EQ_CTL_EVENT_TYPE_SHIFT                16
 #define EQ_CTL_EVENT_TYPE_MASK         0x03FF0000
 
-#define EVENT_QUEUE_MSIX_IDX           5
-
 enum pq_init_status {
        PQ_INIT_STATUS_NA = 0,
        PQ_INIT_STATUS_READY_FOR_CP,
index a9920cb4a07b23f48793777f4fa11bcccea6ec64..0fa80fe9f6cc34e0e180906122c9bb2e6d217dc6 100644 (file)
@@ -8,6 +8,8 @@
 #ifndef GOYA_FW_IF_H
 #define GOYA_FW_IF_H
 
+#define GOYA_EVENT_QUEUE_MSIX_IDX      5
+
 #define CPU_BOOT_ADDR          0x7FF8040000ull
 
 #define UBOOT_FW_OFFSET                0x100000                /* 1MB in SRAM */